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    • 22. 发明专利
    • RECORD SIZE DETECTOR
    • JPS55113169A
    • 1980-09-01
    • JP1837979
    • 1979-02-21
    • HITACHI LTD
    • ASADA AKIHIROTANAKA HIROMICHIIMAMURA OSAMU
    • G11B19/12
    • PURPOSE:To make a secure measurement without influencing fitting accuracy of photo detection holes by setting the counting period of a counter, triggered by a photo detection pulse through a through hole provided in a turntable for record size detection, to a fixed value. CONSTITUTION:When one group of photo detection holes 104... on diameters of turnatable 101 differing in length and shifting in position is detected, FF506 is set to open gate 508, and fixed pulses are counted by counter 509. When this count value is shorter than time t0 until the other group of photo detection holes 104 is detected and longer than the time until one group of photo detection holes 104... is detected, FF506 and counter 509 are reset through comparator 510 to generate a record size detection signal by passing the count value of counter 503 through latch circuit 504, and even if any other photo detection hole than the initial hole is detected first, the record size is detected by the other group of photo detection holes without reference to the fitting accuracy of photo detection holes.
    • 23. 发明专利
    • WATER LEVEL DETECTING DEVICE
    • JPS54104872A
    • 1979-08-17
    • JP1150878
    • 1978-02-06
    • HITACHI LTD
    • IMAMURA OSAMUFUJITA NAOYA
    • G01F23/26
    • PURPOSE:To detect the water level correctly, by providing a first electrode to detect the water level, and a second electrode to convert the change in the water level up to an arbitray set water level different from the first electrode into an electrostatic capacity. CONSTITUTION:The voltage transmitted to one end of each electrode, Cxo, Cy, Cz, appears in each integrating part 3 after passing through detecting parts 5, re-spectively. The output from the water level detecting electrode Cxo after passing through the integrating part 3 is inputted into the positive input terminal of a comparator 1, while the output from the reference voltage electrode Cy is inputted into the negative input terminal of the comparator 1 through a water level setting part 6, and the output from the lowest water level electrode Cz is inputted into the reset terminal of a latch 8 by way of a refill water setting part 7. And the output of the comparator 1 is inputted into the set terminal of the latch 8. Thus, the intersection between Vcy1, Vcy2, Vcy3 showing the output of each set water level of high, medium, and low level of the reference voltage electrode Cy and Vcxo showing the output of the water level detecting electrode may be judged by the comparator 1.
    • 25. 发明专利
    • IMAGE-PICKUP DEVICE
    • JPH10285452A
    • 1998-10-23
    • JP8483397
    • 1997-04-03
    • HITACHI LTD
    • IMAMURA OSAMU
    • H04N5/232H04N5/91
    • PROBLEM TO BE SOLVED: To display a laterally/longitudinally long image as an erected image by providing a pixel number conversion section that converts number of longitudinal/lateral pixels of the image, based on an output of the aspect selector to a device. SOLUTION: A digital video signal S8 outputted from a camera signal- processing section 5 is given to a pixel number conversion section 54 and stored in a RAM 6a. The video signal S8 is read from the RAM 6a by a prescribed method, with a memory address signal 60 being outputted from a read address generating circuit 57 and a video signal S9 for an erected image of a longitudinally long image for laterally long indication is obtained. The video signal S9 is given to a terminal 62 and given to a color liquid crystal display section 75, through the control of switches 65, 69 by a control signal S37 from an RISC- CPU 7 by an aspect selector 16. On the other hand, a digital video signal S8 (erected image of a longitudinally long image for longitudinally long indication) is given to a display memory 68, and an output signal S10 from the memory 68 is given to a display section 75 via the switch 69.
    • 26. 发明专利
    • IMAGE SYNTHESIZING DEVICE
    • JPH04176275A
    • 1992-06-23
    • JP30233990
    • 1990-11-09
    • HITACHI LTD
    • IMAMURA OSAMUAYUSAWA IWAO
    • H04N5/265H04N9/74
    • PURPOSE:To obtain various kinds of image synthesizing effects by providing two switch means selecting either of an input video signal or the output picture signal of a picture signal generation circuit and adding the output picture signal of these switch-means by means of an adder where an addition rate varies. CONSTITUTION:A picture signal (c) is supplied to a B side of a switch 1, and an output picture signal (d) of a picture signal generation circuit 4 to the B side of a switch 2. The switch 1 selects either of picture signals (a) or (c) by means of a control signal (g). The switch 2 selects either of picture signals (b) or (d) by means of a control signal (h). The output picture signals (e) and (f) of the switches 1 and 2 are supplied to an adder 5. Then, for example, the picture signals (a) and (b) are respectively inputted from input terminals 6 and 7, and when the addition rate of the adder 5 is successively changed while the switches 1 and 2 are respectively closed to the A side, the screen obtained in an output terminal 8 is gradually changed from a moving image to a title, or the picture is changed in reverse, and the CF(cross fade) effect can be obtained.
    • 27. 发明专利
    • SYNCHRONIZING SIGNAL GENERATOR
    • JPH03157065A
    • 1991-07-05
    • JP29502889
    • 1989-11-15
    • HITACHI LTD
    • IMAMURA OSAMUAYUSAWA IWAO
    • H04N5/06H04N5/95
    • PURPOSE:To prevent malfunction due to noise of a frequency divider by discriminating whether or not a pulse width of an input synchronizing signal for a pre-hold period represents a regular width or noise, detecting the noise depending on a discrimination signal and initializing the frequency divider with a regular signal. CONSTITUTION:A period signal generator 10 inputs an initial synchronizing signal J and outputs a command signal K applying preholding to a skew and a period scheduling in the vicinity of skew jump production period and operates a discrimination device 9 by using an output L for a period estimating skew and a period after skew jump in the period of the output K. A recovered horizontal synchronizing signal A is inputted to the discrimination device 9, in which the signal is compared with a pulse width in the inside and when the pulse width is regular, it is regarded to be a normal signal and no output is caused, and when the pulse width is not normal, it is regarded as noise and an output I is generated and an output of a delay device 7 is reset. Thus, malfunction of initial operation due to noise is prevented and the phase of a frequency divider 2 is transferred momentarily to the phase of the recovered horizontal synchronizing signal A.
    • 28. 发明专利
    • VIDEO SIGNAL RECORDING AND REPRODUCING DEVICE
    • JPH031695A
    • 1991-01-08
    • JP13466189
    • 1989-05-30
    • HITACHI LTD
    • TAKAHASHI SUSUMUOKU MASUOABE HIROCHIKAFUJII YUKIOIMAMURA OSAMU
    • H04N9/896H04N9/84H04N9/89
    • PURPOSE:To attain high picture quality for a picture even when the picture is reproduced on an IDTV (high quality TV receiver) by providing a time base fluctuation correction device (TBC) provided with a luminance signal correction means and with a color signal correction means or the like and a color signal filter means or the like. CONSTITUTION:A reproducing signal from a switcher 5 supplied to a luminance signal reproducing circuit 6 and a color signal reproducing circuit 7 is inputted to a TBC 13. Then the TBC 13 generates and outputs a luminance signal Y and a chrominance carrier signal C' whose time base fluctuation is corrected via a write control circuit 9, a readout control circuit 10, a decoder 11, an encoder 12 and line memories 8, 8''. Then the signal C, is supplied to a C type frame correlation comb-line filter 16, the signal is retarded by one frame at a frame memory 14, subtracted by a subtraction circuit 15 to eliminate the component not inverted for each frame and to extract the component inverted for each frame. Then the chrominance carrier signal C from which a disturbing signal is eliminated is outputted from the filter 16 and added to a signal Y at an adder circuit 17 and a color video signal with high quality is outputted from an output terminal 18.
    • 29. 发明专利
    • FRAME SYNCHRONIZER WITH NOISE REDUCTION CIRCUIT
    • JPH02272882A
    • 1990-11-07
    • JP9283489
    • 1989-04-14
    • HITACHI LTD
    • OKU MASUOABE HIROCHIKAFUJII YUKIOTAKAHASHI SUSUMUIMAMURA OSAMU
    • H04N5/21
    • PURPOSE:To realize a frame synchronizer provided with a noise reduction circuit whose memory capacity is reduced by providing a memory means provided with two pieces of filed memories. CONSTITUTION:A frame memory 1 consists of two pieces of the field memories 11, 12, and subtracters 31, 32 and a non-linear coefficient circuit 4 constitute the noise reduction circuit. A video signal of every field is stored alternately in two pieces of the field memories 11, 12 the one with phase difference of just one field is stored in the same address according to the phase of an input video signal, and the video signal with the phase difference of one field similarly is outputted to two output terminals according to the phase of an external video signal, and the presence of correlation is detected according to their difference, and a noise component is extracted from the signal having no correlation, and the noise is reduced. Besides, two field memories 11, 12 as a whole cancel the phase difference between the input video signal and the video signal to be the synchronizing standard of an external part, and function as the frame synchronizer.