专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明专利

JPH01286448A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01286448A
公开(公告)日：1989-11-17
申请号：JP11465188
申请日：1988-05-13
申请人： HITACHI LTD
发明人： TANAKA TAMOTSU , EMOTO YOSHIAKI , SATO TOSHIHIKO , KURODA SHIGEO , UDA TAKAYUKI
IPC分类号： H01L23/52 , H01L21/314 , H01L21/3205 , H01L21/60 , H01L23/556
摘要： PURPOSE:To effectively prevent the generation of soft error without decreasing the throughput of solder bump forming process by leaving a part of a metal film for solder substratum electrode stuck on a passivation film of a semiconductor wafer, above an integrated circuit forming region. CONSTITUTION:By using sputtering method or the like, thin films of, e.g., chromium (Cr), copper (Cu) and gold (Au) are stuck in order on the surface of a wafer 1; these thin films are etched by using a resist mask; a solder substratum electrode 5 is formed on the surface of an Al electrode pad 4; an alpha-ray shielding layer 6 is formed above an integrated circuit forming region. After a solder film composed of tin(Sn)-lead(Pb) alloy is selectively stuck on the surface of the solder substratum electrode 5, said solder film is subjected to wet-back in a reflow furnace, thereby forming a hemispherical solder bump 7.

22. 发明专利

JPH01194444A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01194444A
公开(公告)日：1989-08-04
申请号：JP1980688
申请日：1988-01-29
申请人： HITACHI LTD
发明人： UDA TAKAYUKI , TANAKA TAMOTSU , EMOTO YOSHIAKI , KURODA SHIGEO
IPC分类号： H01L21/60 , H01L27/10
摘要： PURPOSE:To reduce a software error due to an alpha-ray by forming an alpha-ray shielding film on the memory circuit forming region of a semiconductor chip when salient-electrodes are formed by lift-off technique on the peripheral circuit forming region of the chip formed of a memory circuit and a peripheral circuit. CONSTITUTION:An alpha-ray shielding film 22 is formed on a passivation film 21AB in a region of a memory circuit RAM of a semiconductor chip 21 formed of a memory circuit and a peripheral circuit or/and a region of a circuit formed of a complementary MISFET. The film 22 is formed to shield an alpha-ray radiated from a radioactive element (U, Th) generation source containing a small amount mainly on salient-electrodes 8. The film 22 is formed of a polyimide series resin film, such as a polyimide/isoindoloquinazolinedione film. The film 22 is formed on a region except a region formed with the electrode 8. Since the film 22 has different thermal expansion coefficient from that of the semiconductor substrate 21A of the chip 21, the film 22 is not brought into contact with the electrode 8 due to the damage or breakdown of the electrode 8 by a thermal stress.

23. 发明专利

JPS63305530A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63305530A
公开(公告)日：1988-12-13
申请号：JP14202687
申请日：1987-06-05
申请人： HITACHI LTD
发明人： EMOTO YOSHIAKI , TANAKA TAMOTSU , MIYAMOTO HIROAKI , KURODA SHIGEO , OTSUKA KANJI
IPC分类号： H01L21/3205 , H01L21/60
摘要： PURPOSE:To improve the accuracy of patterns for conductive films in a wiring, an electrode, etc., by forming a photosensitive second film onto a first film, exposing and developing the second film to shape a first opening, etching the first film to form a second opening and depositing a metallic film into the first and second openings and forming conductor films. CONSTITUTION:A first film 35 not photosensitized is formed onto a substrate 1, a photosensitive second film 36 is shaped onto the film 35, the second film 36 is exposed and developed to form first openings 37 in specified sections, the first film 35 exposed from the first openings 37 are etched to shape second openings having opening diameters larger than those of the first openings 37, and metallic films 25 are deposited into the first openings 37 and the second openings and conductor films are formed. Accordingly, developing patterns are not broken by irregular reflection from wirings, electrodes, etc., thus improving the accuracy of patterns for the conductive films in the wirings, the electrodes, etc.

24. 发明专利

JPS6381951A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6381951A
公开(公告)日：1988-04-12
申请号：JP22598186
申请日：1986-09-26
申请人： HITACHI LTD
发明人： OKUYA KEN , OTSUKA KANJI , TANAKA TAMOTSU , SATO TOSHIHIKO , KOBAYASHI TSUNEO , KURODA SHIGEO , EMOTO YOSHIAKI
IPC分类号： H01L21/60
摘要： PURPOSE:To form a bump on the whole surface of a semiconductor chip by a method wherein a resist mask is shaped onto the semiconductor chip, solder for the bump is evaporated through the resist mask, the resist mask is removed and wet-back treatment is executed. CONSTITUTION:A resist mask 12 is formed onto a semiconductor chip 1, a metal 13 for a bump is evaporated through the resist mask 12, the resist mask 12 is removed, and solder spherical bumps can be shaped without using a metallic mask and a push plate through wet-back treatment after taking off the resist mask 12, thus forming the bumps on the whole surface of the semiconductor chip. The resist mask 12 with a cross section having a reverse trapezoidal section (a shape that a hole with a trapezoidal section is formed) can be shaped by forming the resist mask 12 through a reverse tapered sectional shape preparation by one-time photosensitive method or two-time photosensitive method, thus increasing the density of the bumps.

25. 发明专利

JPS6195596A Multilayer interconnection substrate 失效
标题翻译：多层互连基板
公开(公告)号：JPS6195596A
公开(公告)日：1986-05-14
申请号：JP21614884
申请日：1984-10-17
申请人： Hitachi Ltd
发明人： EMOTO YOSHIAKI , KOBAYASHI TSUNEO
IPC分类号： H05K3/46 , H01L21/768 , H01L23/522

26. 发明专利

JPS6143461A Thin film multilayer interconnection substrate 失效
标题翻译：薄膜多层互连基板
公开(公告)号：JPS6143461A
公开(公告)日：1986-03-03
申请号：JP16496584
申请日：1984-08-08
申请人： Hitachi Ltd
发明人： EMOTO YOSHIAKI , KOBAYASHI TSUNEO , OKUYA KEN
IPC分类号： H01L21/60 , H01L23/538 , H05K1/09
CPC分类号： H01L24/81 , H01L23/5383 , H01L2224/81801 , H01L2924/01029 , H01L2924/01079 , H05K1/09
摘要： PURPOSE:To enable to improve the connecting lifetime of the bump connecting part and to perform a Cu wiring by a method wherein the bonding pad and the wiring layer are both formed of a multilayer metal layer, which is constituted of the intermediate burrier layer consisting of Ni, the upper layer consisting of Au and the lower layer consisting of Ti. CONSTITUTION:A wire bonding pad 2 and a wiring layer 3 to be used for connecting the bump electrode of a semiconductor element 4 coexist on the uppermost layer of a multilayer interconnection substrate 1. This wiring layer 3 is constituted of a multilayer metal layer, which is formed of an intermediate burrier layer 6 consisting of Ni, an upper layer 7 consisting of Au and a lower layer consisting of Ti, and the pad 2 is also constituted of a multilayer metal layer in the same constitution (each of the constituent layers also consists of Ni, Au or Ti) as that of the wiring layer 3. The wiring layer 3 and the pad 2 are simultaneously formed by evaporating the metals consisting the multilayer metal layers.
摘要翻译：目的：为了提高凸块连接部分的连接寿命，并通过一种方法进行Cu布线，其中焊盘和布线层都由多层金属层形成，该层由多层金属层构成，该多层金属层由 Ni，由Au构成的上层和由Ti组成的下层。构成：用于连接半导体元件4的凸块电极的引线接合焊盘2和布线层3共存在多层互连基板1的最上层。该布线层3由多层金属层由由Ni组成的中间层层6，由Au构成的上层7和由Ti组成的下层形成，并且衬垫2也由相同结构的多层金属层构成（各构成层也由Ni，Au或Ti组成）。通过蒸发由多层金属层构成的金属，同时形成布线层3和焊盘2。

27. 发明专利

JPS6057997A METHOD OF PRODUCING MULTILAYER CIRCUIT BOARD 失效
公开(公告)号：JPS6057997A
公开(公告)日：1985-04-03
申请号：JP16498583
申请日：1983-09-09
申请人： HITACHI LTD
发明人： KOBAYASHI TSUNEO , EMOTO YOSHIAKI , KAMATA CHIYOJI , OOTSUKA KANJI
IPC分类号： H05K3/46

28. 发明专利

JPS6020521A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6020521A
公开(公告)日：1985-02-01
申请号：JP12763083
申请日：1983-07-15
申请人： HITACHI LTD
发明人： ISHIDA TAKASHI , SEKI MASATOSHI , SAWARA KUNIZOU , EMOTO YOSHIAKI , KAMATA CHIYOSHI
IPC分类号： H01L21/60
摘要： PURPOSE:To obtain a wiring, dimensional accuracy thereof is high and resistance thereof is low, by forming the wiring on a package substrate by a multilayer wiring consisting of chromium and copper. CONSTITUTION:A wiring 4 is formed as three layer thin-film multilayer wirings consisting of a chromium layer 10 formed on a package substrate 1 after sintering through the evaporation of a thin-film, a copper layer 11 evaporated on the layer 10 in a thin-film shape and a chromium layer 12 evaporated on the layer 11 in the thin-film shape. A pedestal section 5 is composed of a copper layer 13 evaporated on the chromium layer 12 as the uppermost layer of the wiring 4 in the thin-film shape and a chromium layer 14 evaporated around the copper layer 13 in the thin-film shape. Since the wiring 4 is formed by the three layer thin- film evaporated layers of the chromium layer 10, the copper layer 11 and the chromium layer 12, the wiring 4 and the pedestal section 5 are formed with dimensional accuracy higher than a tungsten wiring formed through sintering. Accordingly, a large-sized pellet can be face-down bonded, and the resistance of the wiring 4 can be lowered by the presence of the copper layer 11.

29. 发明专利

JPS59207692A Method of producing multilayer circuit board 失效
公开(公告)号：JPS59207692A
公开(公告)日：1984-11-24
申请号：JP8085883
申请日：1983-05-11
申请人： Hitachi Ltd
发明人： KAMATA CHIYOJI , OOTSUKA KANJI , SAWARA KUNIZOU , EMOTO YOSHIAKI , KOBAYASHI TSUNEO
IPC分类号： H05K3/46 , B32B15/08 , H05K3/40

30. 发明专利

JPS59134859A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS59134859A
公开(公告)日：1984-08-02
申请号：JP724283
申请日：1983-01-21
申请人： Hitachi Ltd
发明人： SATOU KAZUYOSHI , HOSOSAKA HIROSHI , OOTSUKA KANJI , EMOTO YOSHIAKI , ENOMOTO MINORU
IPC分类号： H01L23/34 , H01L23/467
CPC分类号： H01L23/467 , H01L2224/16225 , H01L2924/15192 , H01L2924/15312
摘要： PURPOSE:To obtain a semiconductor device of an excellent heat sink structure by mounting a semiconductor pellet on one surface of an electrically insulating substrate which mainly contains SiC, and connecting it to a wiring substrate mounted on the other surface through the hole of the substrate. CONSTITUTION:An insulating substrate 12 which has mainly SiC and good thermal conductivity is bonded to a wiring substrate 11, and wirings 13, 15 are matched at the corresponding ones. A pipe 16 is provided in position on the surface of the substrate 12, and He 17 is flowed therein. A pellet 18 is disposed on the substrate 12, its electrode pads are matched to the electrode pads of the wirings 15 of the substrate 12, and fusion-bonded through a bump 19. A cover 20 is covered on the substrate 12, and a cavity 21 is airtightly sealed. According to this structure, the head led to the substrate 12 is transmitted through the entire sectional area of the substrate to a cooling pipe. Accordingly, its heat sink is extremely improved. Further, since the thermal expansion coefficient of the substrate of SiC is similar to that of the Si substrate, thermal distortion does not occur.
摘要翻译：目的：通过将半导体颗粒安装在主要包含SiC的电绝缘基板的一个表面上并通过基板的孔将其连接到安装在另一个表面上的布线基板上，从而获得具有优良散热器结构的半导体器件。构成：主要具有SiC和良好导热性的绝缘基板12被接合到布线基板11，并且布线13,15在相应的布线基板11上匹配。管16设置在基板12的表面上，He 17在其中流动。颗粒18设置在基板12上，其电极焊盘与基板12的布线15的电极焊盘匹配，并通过凸块19熔合。盖20覆盖在基板12上，并且空腔 21密封。根据该结构，通向基板12的头部通过基板的整个截面积传递到冷却管。因此，其散热器得到极大改善。此外，由于SiC的基板的热膨胀系数与Si基板的热膨胀系数相同，因此不会发生热变形。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式