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11. 发明专利

JPS5656636A PROCESSING METHOD OF FINE PATTERN 失效
公开(公告)号：JPS5656636A
公开(公告)日：1981-05-18
申请号：JP13389679
申请日：1979-10-13
申请人： MITSUBISHI ELECTRIC CORP
发明人： MASUKO YOUJI , TAKANO HIROZOU , ASAI SOTOHISA , MIZUGUCHI KAZUO , ABE HARUHIKO , NOMOTO SUMIO
IPC分类号： H01L21/302 , H01L21/311 , H01L21/3115 , H01L21/3213 , H01L21/3215
摘要： PURPOSE:To obtain the fine pattern on a material to be processed by a method wherein a metal ion forming an irremovable layer against plasma etching is implanted to form a mask of the fine pattern, and plasma etching is applied by means of said mask. CONSTITUTION:W ion 5 is implanted in a polycrystalline Si film 2 on an SiO2 film 1. From applying next a plasma etching by a gas such as O2, CF4, there is formed an oxidized film 6 of W on the surface, which works as a mask against plasma, therefore a fine pattern can be processed on the polycrystalline Si film 2. According to this constitution, the fine pattern can be formed simply in high precision, and an extra chemical treatment is not required from using no photoresist, thus obtaining etching in a purified state.

12. 发明专利

JPS55126857A SAMPLE COLLECTING METHOD 失效
公开(公告)号：JPS55126857A
公开(公告)日：1980-10-01
申请号：JP3593379
申请日：1979-03-24
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO HIROZOU
IPC分类号： G01N21/31 , G01N35/10
摘要： PURPOSE:To make it possible to obtain accurate analysis results with excellent reproductivity by spraying the tip part of a micro pipette with clean and harmless gas to remove completely sticking or residing fine drops of water. CONSTITUTION:Micro pipette 1 lowers toward water container 4 and sucks and exhausts distilled water and when it starts raising, fine drops of water sticking to or residing on the external wall of the tip of micro pipette 1 are scattered completely by the air pressure of gas jetted from gas jet tube 7 arranged aside micro pipette 1.

13. 发明专利

JPS538068A FINDING METHOD OF MAXIMUM HEAT EVOLVING POINTS 失效
公开(公告)号：JPS538068A
公开(公告)日：1978-01-25
申请号：JP8217276
申请日：1976-07-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO HIROZOU , NISHIOKA SUNAO
IPC分类号： H01L21/66 , G01K3/06
摘要： PURPOSE:To find maximum heat evolving points by coating nematic liquid crystal to a semiconductor element, operating the element and continuously observing and recording the chip surface until the fixed time elapses, then reverse-tracing the records with time.

14. 发明专利

JPS537175A MINUTE MARKING METHOD ON SEMICONDUCTOR ELEMENT SURFACE 失效
公开(公告)号：JPS537175A
公开(公告)日：1978-01-23
申请号：JP8169776
申请日：1976-07-08
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO HIROZOU , NISHIOKA SUNAO
IPC分类号： H01L21/027 , H01L21/302
摘要： PURPOSE:To perform minute marking on semiconductor element surface positively and rapidly while observing the mark with visible light by superposing a laser light beam on the optical axis of a polarization microscope.

15. 发明专利

JPS5291379A IDENTIFICATION METHOD FOR DEFECTIVE CHIP 失效
公开(公告)号：JPS5291379A
公开(公告)日：1977-08-01
申请号：JP778176
申请日：1976-01-27
申请人： MITSUBISHI ELECTRIC CORP
发明人： NISHIOKA SUNAO , TAKANO HIROZOU
IPC分类号： B23K26/00 , H01L21/66
摘要： PURPOSE:To enable a sure identification independently of the crook and the bend of wafer, by radiating laser light beam on the chip judged defective by inspection and attaching trace on it, for a number of chips formed in the semiconductor wafer.

16. 发明专利

JPS5270762A ELECTRODE FORMATION METHOD OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPS5270762A
公开(公告)日：1977-06-13
申请号：JP14665075
申请日：1975-12-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO HIROZOU , NISHIOKA SUNAO
IPC分类号： H01L21/66 , H01L21/28 , H01L21/768 , H01L23/522
摘要： PURPOSE:The wiring layer which is given insualtion coating in diluted silane atmosphere receives laser beam irradiation. Thus, cunductive poly Si electrode can be produced with optional area and at optional position.

17. 发明专利

JPS60193332A Method of annealing compound semiconductor substrate 失效
标题翻译：退火复合半导体衬底的方法
公开(公告)号：JPS60193332A
公开(公告)日：1985-10-01
申请号：JP5031584
申请日：1984-03-14
申请人： Mitsubishi Electric Corp
发明人： TAKANO HIROZOU
IPC分类号： H01L21/324 , H01L21/265
CPC分类号： H01L21/265
摘要： PURPOSE:To realize stabilized annealing while controlling thermal modification of a substrate, by closely contacting a cover film provided on an auxiliary substrate and containing high-density As with the As ion implanting surface of a compound semiconductor substrate containing As, and annealing the substrate under this condition in a non-oxidizing atmosphere. CONSTITUTION:A compound semiconductor substrate 3 containing As is placed on a graphite boat 1 and heated in a non-oxidizing atmosphere to be annealed in the following manner. An auxiliary substrate 4 enclosed by a cover film 5 containing high-density As is closely contacted with the upper surface 3a of the substrate 3 and annealed under this condition. According to this method, the As ions implanted in the substrate 3 are inhibited from dispersing outside, and therefore desired ion implantation characteristics can be obtained without causing thermal modification or alteration in composition.
摘要翻译：目的：为了在控制基板的热改性的同时实现稳定退火，通过将设置在辅助基板上的包含高密度As的覆盖膜与包含As的化合物半导体基板的As离子注入表面紧密接触，并对基板进行退火这种条件在非氧化性气氛中。构成：将含有As的化合物半导体衬底3放置在石墨舟1上，并在非氧化性气氛中加热，以下列方式进行退火。由包含高密度As的覆盖膜5包围的辅助基板4与基板3的上表面3a紧密接触，并在该条件下退火。根据该方法，抑制了植入衬底3中的As离子在外部分散，因此可以获得期望的离子注入特性而不引起热改性或组成变化。

18. 发明专利

JPS5892226A MANUFACTURE OF INTEGRATED CIRCUIT ELEMENT 失效
公开(公告)号：JPS5892226A
公开(公告)日：1983-06-01
申请号：JP19115581
申请日：1981-11-27
申请人： MITSUBISHI ELECTRIC CORP
发明人： UOTANI SHIGEO , TAKANO HIROZOU
IPC分类号： H01L21/312 , H01L21/027 , H01L21/3205
摘要： PURPOSE:To perform self alignment for a stepped undulating section and to simplify a process as well by a method wherein a photo-analysis type organic material is used as an insulating film and high reflection factor of metallic wiring is utilized. CONSTITUTION:On the drawing, 4 is a semiconductor substrate such as silicon, 5 is metallic wiring formed on the semiconductor substrate. Firstly, an organic material including photolysis-type sensitizer 6 is applied by a method such as spin coating. Next, baking is done at a suitable temperature to eliminate welding in the organic material, and when light 7 is equally aimed at the whole face, the organic material right above the metallic wiring out of the photolysis-type organic material strongly receives the influence of reflected light from a bed and effective amount of light being irradiated increases. When a development process is applied to the organic material, more organic material on the metallic wiring is eliminated as opposed to the organic material at the other part as shown in 8 of the photolysis-type organic material and flatness is materialized.

19. 发明专利

JPS5764926A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5764926A
公开(公告)日：1982-04-20
申请号：JP14073880
申请日：1980-10-07
申请人： Mitsubishi Electric Corp
发明人： FUKUMOTO HAYAAKI , SATOU SHINICHI , TAKANO HIROZOU , KOTANI HIDEO , HARADA KOUJI , KAYANO SHINPEI
IPC分类号： H01L21/22 , H01L21/265
CPC分类号： H01L21/265
摘要： PURPOSE:To reduce the lateral spread of a diffusion layer in order to permit a pattern to be more microscopic, by a method wherein regions selectively injected with impurity ions are selectively scanned with an electron beam controlled suitalby, and the regions irradiated with the beam are annealed. CONSTITUTION:For example, in the process for forming the source and drain of an MOSFET, a gate film 3 and a polycrystaline Si film 6 are provided on a substrate 1 separated by a field film 2 and impurity ions are injected into the exposed substrate surface. Then, diffusion regions 4, 5 injected with the ions are selectively scanned with an electron beam 8 through control by means of a computer, and an annealing treatment is locally applied by means of the energy of the electron beam. Because the beam diameter can be made submicroscopic, it is possible to selectively anneal necessary portions without laterally spreading the diffusion layers 4, 5. In addition, it becomes possible to effect control in the depthwise direction by means of acceleration energy and output.
摘要翻译：目的：为了减少扩散层的横向扩散，以便允许图案更微观，通过其中选择性地注入杂质离子的区域被选择性地用电子束来控制扫描的方法，并且用光束照射的区域是退火。构成：例如，在用于形成MOSFET的源极和漏极的工艺中，在由场膜2分离的衬底1上设置栅极膜3和多晶硅膜6，并将杂质离子注入暴露的衬底表面。然后，借助于计算机通过控制，用电子束8选择性地扫描注入了离子的扩散区域4,5，并且通过电子束的能量局部地施加退火处理。由于光束直径可以是亚微观的，所以可以选择性地退火所需部分而不会横向扩散扩散层4,5。另外，可以通过加速能量和输出来实现深度方向的控制。

20. 发明专利

JPS5737830A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5737830A
公开(公告)日：1982-03-02
申请号：JP11449280
申请日：1980-08-19
申请人： Mitsubishi Electric Corp
发明人： SATOU SHINICHI , HARADA HIROJI , FUKUMOTO HAYAAKI , TAKANO HIROZOU , KOTANI HIDEO , KAYANO SHINPEI
IPC分类号： H01L21/033 , H01L21/283 , H01L21/318 , H01L21/336
CPC分类号： H01L29/66575 , H01L21/033 , H01L21/283 , H01L21/3185
摘要： PURPOSE: To form a microscopic contact hole without forming a mask for the subject semiconductor device by a method wherein the contact region on the surface of a substrate is converted to a nitriding film by injecting an N
2 ion on the contact region using a direct patterning method and after the surface has been oxidized, the nitriding film is removed.
CONSTITUTION: After a gate polycrystalline Si 14 and a source and drain diffusion layer 2 have been formed on the substrate 1, the N
2 ion is injected in the region 8 which is contacted to an electrode using the ion beam direct patterning method. Then, the injected region 8 is converted to a nitriding film by performing an annealing treatment in an N
2 atmosphere at the temperature of 1,000W1,050°C. Subsequently, after an oxide film 9 has been formed on the surface excluding the nitriding film by performing a thermal oxidation teratment, a contact hole is formed by re moving the nitriding film 9 using phosphoric acid and the like, for example, and an electrode wiring 7 is formed. Through these procedures, a microscopic contact hole of approximately 1μm or below can be formed without fail.
COPYRIGHT: (C)1982,JPO&Japio
摘要翻译：目的：为了通过以下方法形成微细接触孔，所述微孔接触孔通过其中通过使用直接图案化方法将接触区域上注入N 2离子将基底表面上的接触区域转变为氮化膜的方法在表面被氧化后，除去氮化膜。构成：在基板1上形成栅极多晶Si 14和源极和漏极扩散层2之后，使用离子束直接图案化方法将N 2离子注入到与电极接触的区域8中。然后，通过在氮气气氛中在1000-1.050℃的温度下进行退火处理，将注入区域8转化为氮化膜。随后，在通过进行热氧化破坏而在除了氮化膜之外的表面上形成氧化膜9之后，例如通过使用磷酸等将氮化膜9重新移动而形成接触孔，并且电极配线形成7。通过这些方法，可以形成大约1mum以下的微观接触孔。

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