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11. 发明专利

JP2006190829A Wafer carrier 审中-公开
标题翻译：散热器
公开(公告)号：JP2006190829A
公开(公告)日：2006-07-20
申请号：JP2005001697
申请日：2005-01-06
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： MASUYAMA SHOJI , UEMATSU EI , IKEDA TAKESHI
IPC分类号： H01L21/673 , B65D25/04 , B65D25/20 , B65D85/86
摘要： PROBLEM TO BE SOLVED: To surely prevent a wafer insertion failure by elevating the discrimination of a wafer insertion groove and hasten and facilitate the wafer insertion work. SOLUTION: A wafer carrier 1 has many grooves 3 mutually opposed to guide and support a wafer W marginal part in inner walls of a pair of opposed side walls 2, 2. The grooves 3 are formed with protrusions 4 projecting from the inner wall of the side wall 2 at specified pitches to house the wafer W inserted between each pair of grooves 3, 3 opposite to the side walls 2, 2. The white and black protrusions 4 are disposed alternately on the inner wall surface and a pair of mutually opposed protrusions 4, 4 on two inner walls so that the same white or black protrusions 4, 4 are disposed. This facilitates discriminating a pair of grooves 3, 3 mutually corresponding to the opposite inner wall surfaces. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过提高晶片插入槽的识别并加速并有利于晶片插入工作，可靠地防止晶片插入故障。解决方案：晶片载体1具有相互相对的许多槽3，以引导和支撑一对相对侧壁2,2的内壁中的晶片W边缘部分。槽3形成有从内部突出的突起4 侧壁2的壁以规定间距容纳插入在与侧壁2,2相对的每对槽3,3之间的晶片W.白色和黑色突起4交替地设置在内壁表面上，一对在两个内壁上相互相对的突起4,4形成相同的白色或黑色突起4,4。这有助于区分与相对的内壁表面相对应的一对凹槽3,3。版权所有（C）2006，JPO＆NCIPI

12. 发明专利

JP2006173426A Method of evaluating roughness on semiconductor wafer rear face, and semiconductor wafer 审中-公开
标题翻译：在半导体波形表面和半导体波长上测量粗糙度的方法
公开(公告)号：JP2006173426A
公开(公告)日：2006-06-29
申请号：JP2004365433
申请日：2004-12-17
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： IKEDA TAKESHI , MASUYAMA SHOJI
IPC分类号： H01L21/66 , H01L21/306
摘要： PROBLEM TO BE SOLVED: To provide a method of objectively evaluating, in a short time, the roughness of a semiconductor wafer rear face etched after lapping, and a semiconductor wafer stable in epitaxial characteristics obtained by the method.
SOLUTION: The semiconductor wafer which is etched after lapping is set on a microscopic photographing device with an exposure time numerically displayed, the exposure time for the rear face of the semiconductor wafer is measured, and the roughness of the wafer rear face is evaluated based on a known correlation between the exposure time and the etched amount. In a simple manner, a standard exposure time of the rear face for a semiconductor wafer having targeted standard rear face roughness is measured, the actual exposure time is measured for the rear face of the semiconductor wafer to be actually evaluated, and the actual exposure time is compared with the standard exposure time to evaluate the rear face roughness of the semiconductor wafer.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种在短时间内客观地评估研磨后蚀刻的半导体晶片背面的粗糙度和通过该方法获得的外延特性稳定的半导体晶片的方法。解决方案：研磨后蚀刻的半导体晶片被设置在以数字显示曝光时间的显微摄影装置上，测量半导体晶片的背面的曝光时间，并且晶片背面的粗糙度为基于曝光时间和蚀刻量之间的已知相关性来评估。以简单的方式，测量具有目标标准背面粗糙度的半导体晶片的背面的标准曝光时间，对实际评估的半导体晶片的背面测量实际曝光时间，实际曝光时间与标准曝光时间进行比较，以评估半导体晶片的背面粗糙度。版权所有（C）2006，JPO＆NCIPI

13. 发明专利

JP2006173353A Method and device for processing wafer by chamfering machine 审中-公开
标题翻译：通过切割机加工水分的方法和装置
公开(公告)号：JP2006173353A
公开(公告)日：2006-06-29
申请号：JP2004363604
申请日：2004-12-15
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： WATANABE NOBUFUMI , IKEDA TAKESHI
IPC分类号： H01L21/304 , B24B9/00 , B24B17/10 , B24B49/16
摘要： PROBLEM TO BE SOLVED: To provide a processing method and a processing device in a chamfering machine which can stably supply a highly precise wafer by stabilizing a chamfering shape of the outer peripheral part of the wafer and reducing occurrence of fine chipping in a chamfering part.
SOLUTION: In the processing method, change of grinding resistance in grinding for chamfering is detected by change of the power amount of a grinding stone rotary motor 4, and grinding velocity, that is, the number of rotations of a wafer rotary motor 3 is controlled on the basis of detected change of the power amount of the grinding stone rotary motor 4. The processing device has a chamfering machine for grinding and processing the outer periphery of the rotating wafer 1 by a rotating grinding stone 2, a motor power amount detector 5 for detecting change of power amount of the grinding stone rotary motor 4 which rotates the grinding stone in grinding, and a control device 6 which controls the number of rotations of the motor 3 rotating the wafer 1 based on change of the power amount of the grinding stone rotary motor 4 detected by the motor power amount detector 5 and changes grinding speed.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在倒角机中提供一种加工方法和加工装置，其可以通过稳定晶片的外周部分的倒角形状并且减少在晶片的外周部分的发生而稳定地供应高精度晶片倒角部分。解决方案：在加工方法中，通过磨石回转马达4的功率量的改变和研磨速度，即晶片旋转马达的转数来检测用于倒角的研磨中的耐磨性的变化根据检测到的磨石回转马达4的动力量的变化来控制。加工装置具有倒角机，用于通过旋转的研磨石2，电动机功率对旋转晶片1的外周进行研磨和加工用于检测在研磨中旋转磨石的磨石回转电动机4的功率量的变化的量检测器5，以及控制装置6，其控制基于电力量的变化旋转晶片1的电动机3的转数由电机功率检测器5检测到的磨石回转马达4，并且改变磨削速度。版权所有（C）2006，JPO＆NCIPI

14. 发明专利

JP2005101120A Compound semiconductor wafer and its cleavage method 审中-公开
标题翻译：复合半导体波形及其清除方法
公开(公告)号：JP2005101120A
公开(公告)日：2005-04-14
申请号：JP2003330914
申请日：2003-09-24
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： SUZUKI TAKASHI , IKEDA TAKESHI
IPC分类号： H01L21/304 , H01L21/02 , H01S5/02
摘要： PROBLEM TO BE SOLVED: To provide a compound semiconductor wafer wherein a cleavage plane is formed with high yield, in a wafer in which an orientation flat or an index flat is formed by the cleavage surface, and also to provide its cleavage method.
SOLUTION: The rough-surface finish 7 is processed in one side 3 of the wafer 1 with different roughness in the front surface from that in the back surface, at a previous process of the cleavage process.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种化合物半导体晶片，其中在通过劈裂表面形成取向平面或折射平面的晶片中以高产率形成解理面，并且还提供其切割方法。解决方案：粗糙表面光洁度7在前面的切割过程中在表面的表面与后表面的粗糙度不同的一面3处理。版权所有（C）2005，JPO＆NCIPI

15. 发明专利

JP2013094847A Finish rolling method and apparatus for deformed cross-sectional bar 审中-公开
标题翻译：完成轧制方法和设备的变截面横截面
公开(公告)号：JP2013094847A
公开(公告)日：2013-05-20
申请号：JP2011242450
申请日：2011-11-04
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： IKEDA TAKESHI
IPC分类号： B21B1/08
摘要： PROBLEM TO BE SOLVED: To provide a finish rolling method and apparatus for a deformed cross-sectional bar, capable of preventing increase in manufacturing cost or delivery delay due to deterioration of yield by preventing insufficient push-in of an inclined surface connecting a step in difference between a thick plate portion and a thin plate portion in finish rolling.SOLUTION: In the finish rolling method of a deformed cross-sectional bar 32 having a projection 33 formed along the longitudinal direction for finish-rolling the deformed cross-sectional bar 32 with a grooved mill roll 42, the width of the projection 33 of the deformed cross-sectional bar 32 is adjusted by bending so as to be conformed to the width of the groove of the mill roll 42 prior to the finish-rolling with the mill roll 42.
摘要翻译：要解决的问题：提供一种用于变形横截面杆的精轧方法和装置，其能够防止因连接的倾斜面的不足的推入而导致的生产成本降低或产量劣化的增加在精轧中厚板部分和薄板部分之间的差别的步骤。解决方案：在具有沿着纵向方向形成的突起33的变形横截面杆32的精轧方法中，用于利用带槽的轧辊42对变形的横截面杆32进行精轧，突起的宽度通过弯曲来调节变形的横截面杆32的33，以便在用轧辊42进行精轧之前与轧辊42的槽的宽度一致。（C）2013 ，JPO＆INPIT

16. 发明专利

JP2011147977A Method of producing copper strip material having deformed cross section 审中-公开
标题翻译：生产具有变形交叉部分的铜带材料的方法
公开(公告)号：JP2011147977A
公开(公告)日：2011-08-04
申请号：JP2010011917
申请日：2010-01-22
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： IKEDA TAKESHI
IPC分类号： B21C37/04 , B21B1/08 , B21B13/20 , B21C47/00 , B21H8/00
摘要： PROBLEM TO BE SOLVED: To provide a method of producing a copper strip material having a deformed cross section, by which a slitting process is omitted.
SOLUTION: The method of producing the copper strip material having the deformed cross section comprises: a strip material supplying process where a flat-plate-like copper strip material 6 is supplied to a flat-board-like V-shaped die 1; a pressure press working process where the flat-plate-like copper strip material 6 is pressurized against a base face on which a V-shaped projection part is provided; a rolling process where the copper strip material 7 having the deformed cross section having a thick plate part 7a formed in a portion of the flat-plate-like copper strip material 6 which is passed through a grooved part 16 and a thin plate part 7b formed in a portion passing through the V-shaped projection part is formed by pulling out the pressurized flat-plate-like copper strip material 6 from one end toward the other end; and an overall width control process where the overall width of the deformed copper strip material 7 is measured and variation in the overall width of the produced copper strip material 7 having the deformed cross section is controlled within a predetermined range on the basis of the measurement result.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造具有变形横截面的铜带材的方法，通过该方法省略了切割工艺。解决方案：具有变形横截面的铜带材的制造方法包括：将平板状铜带材料6供给到平板状V字形模具1的带材供给工序 ; 平板状铜带材料6被压靠在其上设置有V形突起部分的基面上的压力加工工艺; 其中具有变形横截面的铜带材7具有形成在平板状铜带材6的穿过开槽部分16的一部分中的厚板部分7a和形成的薄板部分7b 在通过V形突起部分的部分中，通过从一端向另一端拉出加压的平板状铜带材6而形成; 以及整体宽度控制处理，其中测量变形的铜带材料7的总宽度，并且基于测量结果将具有变形横截面的生产的铜带材料7的总宽度的变化控制在预定范围内。版权所有（C）2011，JPO＆INPIT

17. 发明专利

JP2009167057A Method for manufacturing nitride semiconductor substrate 有权
标题翻译：制备氮化物半导体衬底的方法
公开(公告)号：JP2009167057A
公开(公告)日：2009-07-30
申请号：JP2008007171
申请日：2008-01-16
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： SUZUKI TAKAMASA , IKEDA TAKESHI , MEGURO TAKESHI
IPC分类号： C30B29/38 , C23C16/34 , C30B25/18 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a nitride semiconductor substrate which enables manufacturing of a nitride semiconductor substrate having little dispersion in the off-angle.
SOLUTION: In the method for manufacturing the nitride semiconductor substrate, comprising forming a nitride semiconductor layer (2) on a ground substrate (1) and preparing a self-supporting nitride semiconductor substrate (3) by using the nitride semiconductor layer (2) separated from the ground substrate (1), when the warp amount of the ground substrate (1) is defined as the difference between the height of the surface being a crystal growth surface at the central position of the ground substrate (1) and the height of the surface being a crystal growth surface at a position separated from the center of the ground substrate (1) by a distance R (provided that the difference between the heights of the surfaces is set to be negative when the surface of the ground substrate (1) has a convex shape and set to be positive when the surface of the ground substrate (1) has a concave shape), the warp amount of the ground substrate (1) is in a range of -100 to -20 μm when R is 25 mm.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种能够制造偏离角小的偏移的氮化物半导体衬底的氮化物半导体衬底的制造方法。解决方案：在制造氮化物半导体衬底的方法中，包括在接地衬底（1）上形成氮化物半导体层（2）并通过使用氮化物半导体层（1）制备自支撑氮化物半导体衬底（3） 2）与接地基板（1）分离，当接地基板（1）的翘曲量被定义为在接地基板（1）的中心位置处的晶体生长表面的表面的高度与在基底表面的高度是在从基底（1）的中心离开距离R的位置处的晶体生长表面（假设当地面的表面之间的表面高度之间的差设置为负时衬底（1）具有凸形形状，并且当接地衬底（1）的表面具有凹形）时设置为正，接地衬底（1）的翘曲量在-100至-20μm的范围内当R为25mm时。版权所有（C）2009，JPO＆INPIT

18. 发明专利

JP2007165529A Working method on semiconductor wafer comprising cleaved surface, and semiconductor wafer obtained thereby 审中-公开
标题翻译：包含清洁表面的半导体波形的工作方法和获得的半导体波形
公开(公告)号：JP2007165529A
公开(公告)日：2007-06-28
申请号：JP2005358877
申请日：2005-12-13
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： WATANABE NOBUFUMI , IKEDA TAKESHI , MASUYAMA SHOJI
IPC分类号： H01L21/304 , H01L21/02
摘要： PROBLEM TO BE SOLVED: To provide a working method of a semiconductor wafer comprising a cleaved surface capable of obtaining a wafer of stable precision.
SOLUTION: A semiconductor wafer provided by slicing from a semiconductor single crystal ingot is worked in an etching process for removing work distortion of the wafer, before a chamfering process for chamfering the wafer.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种包括能够获得稳定精度的晶片的切割表面的半导体晶片的工作方法。解决方案：在用于倒角晶片的倒角处理之前，在用于去除晶片的工作变形的蚀刻工艺中，对从半导体单晶锭切片提供的半导体晶片进行加工。版权所有（C）2007，JPO＆INPIT

19. 发明专利

JP2004281951A Semiconductor wafer 审中-公开
公开(公告)号：JP2004281951A
公开(公告)日：2004-10-07
申请号：JP2003074680
申请日：2003-03-19
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： SUZUKI TAKASHI , IKEDA TAKESHI
IPC分类号： H01L21/304 , H01L21/02
摘要： PROBLEM TO BE SOLVED: To provide a structure of a semiconductor wafer capable of easily discriminating an inside and outside of the wafer with a notch.
SOLUTION: Any one of a front tapered part and a back tapered part of a chamfering part 21 of a wafer outer periphery 20 is made as a concave surface 24, or any one of the front tapered part and the back tapered part of the chamfering part 21 of a wafer notch 30 is made as the concave surface 24.
COPYRIGHT: (C)2005,JPO&NCIPI

20. 发明专利

JP2010272574A Method of manufacturing gallium nitride substrate 审中-公开
标题翻译：制造氮化镓衬底的方法
公开(公告)号：JP2010272574A
公开(公告)日：2010-12-02
申请号：JP2009120911
申请日：2009-05-19
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： IKEDA TAKESHI
IPC分类号： H01L21/304 , B24B27/06 , B28D5/04
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing gallium nitride substrates, with which a gallium nitride substrate can be manufactured which is free of cracking etc., due to processing strain remaining on a surface opposite to one surface, having been flattened into a flat surface which does not have processing strains and has small in-plane thickness variations, even after the gallium nitride substrate obtained by slicing has the one surface flattened into the flat surface, by defining an average grain size in detail, when gallium nitride thick-film single crystal is sliced. SOLUTION: In the method of manufacturing the gallium nitride substrate, with which the gallium nitride thick-film single crystal is grown on a substrate and then sliced to manufacture a plurality of sheets of gallium nitride substrates, abrasive grains of 9.5 to 14 μm in average grain size are used, when the gallium nitride thick-film single crystal is sliced. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种制造氮化镓衬底的方法，由于在与一个表面相对的表面上残留的加工应变，可以制造氮化镓衬底，其不会产生裂纹等即使在通过切割获得的氮化镓衬底的一个表面平坦化成平坦表面之后，通过限定平均晶粒尺寸，当镓被平坦化时，平坦化成不具有加工应变并且具有小的面内厚度变化的平坦表面氮化物厚膜单晶切片。解决方案：在制造氮化镓衬底的方法中，氮化镓厚膜单晶在衬底上生长，然后切片以制造多片氮化镓衬底，磨粒为9.5至14 当氮化镓厚膜单晶被切片时，使用平均晶粒尺寸的μm。版权所有（C）2011，JPO＆INPIT

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