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11. 发明专利

JPH0944998A REPRODUCED SIGNAL PROCESSING CIRCUIT AND MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPH0944998A
公开(公告)日：1997-02-14
申请号：JP19750495
申请日：1995-08-02
申请人： HITACHI LTD
发明人： HIROOKA TSUGUYOSHI , MIYAZAWA SHOICHI , HOTTA RYUTARO , ISHIDA YOSHITERU , KATSU HARUTO , NARA TAKASHI , TAKASHI TERUMI
IPC分类号： G11B20/10 , H03H21/00 , H04B3/06 , H04L25/03
摘要： PROBLEM TO BE SOLVED: To obtain a signal processing circuit for magnetic recording device having a small circuit scale and low power consumption even though the circuit is of a PR10, system. SOLUTION: At the time of a non-reproducing, an amplitude control is performed by controlling a VGA 2 based on the output of an LPF 3 by an amplitude control circuit (a) 9. At the time of a reproducing, an amplitude control circuit (b) 10 controls an amplitude by utilizing a waveform equalizer 5 based on the output of the equalizer 5. In the case a transvesal type filter is used as the waveform equalizer 5, the amplitude is controlled by changing the coefficient of a center tap. Moreover, this circuit may be constituted so that a fixed gain is only applied to the VGA by eliminating the amplitude control circuit (a) 9. Since it is not necessary that a control amouns is converted from a digital value into an analog value in the amplitude control circuit (b) 10, the circuit scale and power consumption of the circuit are remarkably reduced.

12. 发明专利

JPH08321142A METHOD FOR JUDGING CORRECTNESS OF SERVO SECTOR ADDRESS, DISK-TYPE STORAGE, AND ITS CONTROL DEVICE 失效
公开(公告)号：JPH08321142A
公开(公告)日：1996-12-03
申请号：JP12672995
申请日：1995-05-25
申请人： HITACHI LTD
发明人： TSUNODA MOTOYASU , MIYAZAWA SHOICHI , OGAWA HITOSHI , NAKAI KOSUKE , NISHINA MASATOSHI , YAMAMOTO KATSUMI
IPC分类号： G11B20/12 , G11B19/02 , G11B20/18 , G11B21/10 , G11B27/10
摘要： PURPOSE: To improve the reliability of a system by comparing an address read from a servo sector with a servo sector address which is predicted from the address and generating a required data sector address. CONSTITUTION: A CPU 11 calculates an address on a recording medium requested from a computer 15 and reports it to a control part 8. The control part 8 obtains a data sector address from the read signal and sends it to a control part 9. At the same time, a signal for following a head 6 is sent to a driver 5, thus enabling the head 6 to be moved to a target position and an amplifier 4 to amplify a signal read by the head 6 and output it to a device 3. The device 3 classifies data and sends it to the control part 9. The control part 9 judges whether the transmitted data are proper or not and sends the conforming data to a control part 12 and a control part 10. The control part 12 sends data whose error is corrected to a computer 15 by the control part 10 via a buffer 13 and a control part 14.

13. 发明专利

JPH08287607A MAGNETIC DISK DEVICE 失效
公开(公告)号：JPH08287607A
公开(公告)日：1996-11-01
申请号：JP8960995
申请日：1995-04-14
申请人： HITACHI LTD
发明人： KATSU HARUTO , MIYAZAWA SHOICHI , HIROOKA TSUGUYOSHI , TAKASHI TERUMI , NARA TAKASHI
IPC分类号： G11B20/10 , G11B20/18
摘要： PURPOSE: To compensate circuit loss fluctuation in an analog waveform equalizer by comparing the peak value of a reproduced data signal inputted to an A/D converter with an expected value and correcting the A/D conversion coefficient. CONSTITUTION: Power consumption in a read system circuit is reduced by using the waveform equalizer 8 of analog system. At this time, a peak value detection circuit 15 detects a signal value in a peak point of a waveform of the reproduced data signal from a PR processor 9. Whenever a mean value calculation circuit 16 detects a prescribed number of peak signals, it calculates the mean value M of the peak signal values. An operation circuit 17 compares the expected value Y of the peak signal value stored beforehand in a register 18 with the mean value M, and corrects a reference voltage V imparted to the A/D converter 10 based on the comparison to keep it to a voltage hold circuit 19. The A/D converter 10 converts the reproduced data signal from the PR processor 9 by the corrected reference voltage V, and eliminates the loss fluctuation in the analog waveform equalizer 8 to send it to a viterbi decoder 11.

14. 发明专利

JPH08147887A DECODING CIRCUIT AND REPRODUCING DEVICE 失效
公开(公告)号：JPH08147887A
公开(公告)日：1996-06-07
申请号：JP28520694
申请日：1994-11-18
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： SAIKI EISAKU , ASHIKAWA KAZUTOSHI , MITA SEIICHI , SUZUMURA SHINTARO , MIYAZAWA SHOICHI , HIROOKA TSUGUYOSHI
IPC分类号： G11B5/012 , G11B5/09 , G11B20/10 , H03H15/00 , H03H17/00 , H03H21/00 , H03M13/23 , H04B3/04 , H04L25/497 , H03M13/12
摘要： PURPOSE: To enable high-precision data sampling by converting the signals processed by a PR processing means into digital data based on the timing of reference clocks. CONSTITUTION: AGC control is carried out by adjusting the gain of the VGA 6 using sample values converted into digital signals by means of an A/D converter 8. And a PLL controller 16 controls sampling clocks 101 at the time of converting the sample values into digital signals by the A/D converter 8. At the time of accessing, a disk controller 24 instructs to control an actuater controller 26, which calculates the moving speed and the number of moving tracks of the magnetic head using the output signals from a servo positioning detection section and, based on the results of this calculation, drives an actuater 3 through an actuater driver 27 to control the positioning of a magnetic head.

15. 发明专利

JPH0878982A AGC AMPLIFIER CONTROL CIRCUIT 失效
公开(公告)号：JPH0878982A
公开(公告)日：1996-03-22
申请号：JP21558294
申请日：1994-09-09
申请人： HITACHI LTD
发明人： WATANABE KUNIO , MIYAZAWA SHOICHI , HOTTA RYUTARO , HASE KENICHI , ISHIDA YOSHITERU , NARA TAKASHI , TAKASHI TERUMI
IPC分类号： H03G3/20 , H03G3/30 , H03G5/16
摘要： PURPOSE: To constantly maintain the output of a digital equalizer to an arbitrary value by controlling the slice level of an analog AGC loop so that the output value of the digital equalizer may be the expected value of a maximum decoding in the analog AGC loop. CONSTITUTION: When a signal DEQOUT is lower than the output expected value VTH of the output DEQOUT of a digital equalizer 14, a digital detector 16 compares the expected value VTH and the signal DEQOUT and outputs a signal UP when the signal DEQOUT is low. An MPU 17 increases the value of a slice level setting register 18 according to this output. Therefore, the DAC of an analog AGC control 19 increases a slice level VSL for discharge and a slice level VSH for charge, performs discharge/charge operations by higher threshold and lowers VAGC. As a result, the voltage difference of control voltage VAGC and VREF becomes large and an AGC amplifier 11 increases the the amplitude control of an analog AGC loop. The control is repeated so that the expected value VTH and the value of the signal DEQOUT may be equal.

16. 发明专利

JPH07282405A DIGITAL TRANSVERSAL FILTER 失效
公开(公告)号：JPH07282405A
公开(公告)日：1995-10-27
申请号：JP7043794
申请日：1994-04-08
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： YAMAKAWA HIDEYUKI , ISHIDA YOSHITERU , SATO NAOKI , HOSHINO MASAKAZU , TAKASHI TERUMI , MIYAZAWA SHOICHI
IPC分类号： G11B5/09 , H03H15/00 , H03H17/00 , H03H17/02 , H03H21/00 , H04B3/04
摘要： PURPOSE:To always suppress the power consumption to a minimum by varying the number of taps of a transversal filter conforming to an equalization charac teristic to be aimed at and suppressing a circuit scale, in a high speed digital transversal filter which is a parallel multiplication type and performs multi-step pipeline processing. CONSTITUTION:Partial product generating circuit 22, an adder circuit 23 and a flip flop 24 constitute one tap. This flip flop 24 is used as both a delay element between taps and a latch function for a pipeline. A logical product circuit 11 is a control means of the number of taps to be operated, and controls it with a 'select' signal. When 'select' signal is '1', all taps are operate, a transversal filter having 5 taps is realized. When 'select' signal is '0', taps in which coefficients h5, h4 are set such as the partial product generating circuits 22, 25, adder circuits 23, 26, flip flop circuits 34, 27 are not operated, and only remaining 3 taps are operated.

17. 发明专利

JPH07235134A AGC CONTROL CIRCUIT 失效
公开(公告)号：JPH07235134A
公开(公告)日：1995-09-05
申请号：JP2506494
申请日：1994-02-23
申请人： HITACHI LTD
发明人： WATANABE KUNIO , MIYAZAWA SHOICHI , HOTTA RYUTARO , SHIMIZU HIDEKI , HASE KENICHI , KIMURA HIROSHI , NARA TAKASHI
IPC分类号： G11B20/10
摘要： PURPOSE:To control an amplitude of an AGC amplifier even if an output amplitude is not recovered, thereby to recover the output amplitude, by forcibly execute discharging for a user's desired period when the amplitude of the AGC amplifier is led in. CONSTITUTION:When an RX signal for controlling or stop controlling an AGC loop is turned ON to start leading-in of an amplitude, a D flip-flop in a time control discharge signal-generating circuit 1.20 is set when the RX signal rises and, a TDIS signal becomes 'H'. Thereafter, if an excessive response is brought about and the amplitude is decreased to a level not detectable at, a slice level, a user's optional term set by a register for setting a discharge time is counted by a counter built in the circuit 1.20. During this time, an output signal DCHG of an OR circuit 1.19 is enabled, and a switch 1.10 is turned ON. A discharge current is forcibly supplied from a current source 1.13 regardless of the slice level, so that the amplitude is recovered.

18. 发明专利

JPH07210327A DATA VERIFYING DEVICE FOR DISK DEVICE 失效
公开(公告)号：JPH07210327A
公开(公告)日：1995-08-11
申请号：JP651894
申请日：1994-01-25
申请人： HITACHI LTD
发明人： OGAWA HITOSHI , KATAYAMA YUKARI , TSUNODA MOTOYASU , KOJIMA AKIRA , FUJII YOSHIKATSU , MIYAZAWA SHOICHI
IPC分类号： G06F3/06
摘要： PURPOSE:To provide a data verifying device for a disk device for not stopping the read of data even when an error is generated in the read data at the time of verifying the data while preventing erroneous error correction. CONSTITUTION:The data to be a reference for checking whether or not write is correctly performed preserved tentatively in a butter are compared with the read data from a disk in a comparator 105 and a result is preserved in a latch 104. Also, when non-coincidence is present in comparison, the position is preserved in a CMP error position preservation part 118. In the meantime, the data from the disk are processed in an ECC processing part 112 and an error correction pattern 113 for performing error correction and an error position 114 are obtained. By performing the comparison by the comparator 115 and the comparator 109, whether or not the position where a comparison error is generated and the position which is the object of the error correction are the same is investigated by a byte unit and a bit unit.

19. 发明专利

JPH06209231A AUTOMATIC CHARACTERISTIC ADJUSTING CIRCUIT FOR ACTIVE FILTER FOR SIGNAL PROCESSING 失效
公开(公告)号：JPH06209231A
公开(公告)日：1994-07-26
申请号：JP263593
申请日：1993-01-11
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： SAIKI EISAKU , TATEYAMA TSUYOSHI , SUZUMURA SHINTARO , MIYAZAWA SHOICHI , URAGAMI KEN
IPC分类号： H03H11/04
摘要： PURPOSE:To correct the characteristic fluctuation of an active filter for signal processing by using a square wave for a reference frequency signal A with a high precision equal to the case of using a sine wave. CONSTITUTION:The square wave reference frequency signal A is inputted from an input terminal 4, and converted into a signal B of a waveform which is close to the sine wave such as a triangular wave signal with less higher harmonic components than the square wave form wave. The signal B is processed by a filter 6 for reference having the similar characteristic fluctuation to an active filter 2 for signal processing. A control signal generating means 7 detects the fluctuation of the characteristic of the filter 6 for reference from the output signal C of the filter 6 for reference, and generates a control signal D so as to reduce the characteristic fluctuation. The characteristic of the active filter 2 for signal processing is controlled by the control signal D. The characteristic fluctuation of the filter 6 for reference and the active filter 2 for signal processing is the same, so that the characteristic fluctuation of the active filter 2 for signal processing can be corrected by the control signal D.

20. 发明专利

JPH0689405A DATA REPRODUCING CIRCUIT AND MAGNETIC DISK DEVICE USING THE SAME 失效
公开(公告)号：JPH0689405A
公开(公告)日：1994-03-29
申请号：JP23970192
申请日：1992-09-08
申请人： HITACHI LTD
发明人： SHIMIZU HIDEKI , MIYAZAWA SHOICHI , WATANABE KUNIO , NAKAI MOTOHIRO , URAGAMI KEN
IPC分类号： G11B5/09 , G11B20/10 , G11B20/18
摘要： PURPOSE:To set a max. output dynamic range of an analog amplifier, an output sync current and a signal amplitude value so that an error generating rate of data is obtained within a prescribed range and power consumption is minimum. CONSTITUTION:A current source for an amplifier 103 and its output stage 104 in the analog amplifier 101 is controlled by a bias voltage E14 from a current source control circuit 102 corresponding to a current value data Dcrt from a hard disk controller 128, thus setting the max. output dynamic range, the output sync current and the signal amplitude value of the analog amplifier. These max. output dynamic range, output sync current and signal amplitude value are variable in accordance with the current value data Dcrt, while the current value data Dcrt is peroperly set. By this method, the max. output dynamic range, output sync current and signal amplitude value can be set so that the error generating rate of data is obtained within the prescribed range and the power consumption is minimum.

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