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11. 发明专利

JPH02288229A PLASMA TREATMENT DEVICE 失效
公开(公告)号：JPH02288229A
公开(公告)日：1990-11-28
申请号：JP10763689
申请日：1989-04-28
申请人： HITACHI LTD
发明人： NAKAJIMA KAZUHIRO , SASABE SHUNJI , SUZUKI YASUMICHI , SAITO YUTAKA
IPC分类号： C23F4/00 , H01L21/205 , H01L21/302 , H01L21/3065
摘要： PURPOSE:To execute plasma treatment uniformly to the whole of a material to be treated by forming a different diametral section, a diameter of which is increased gradually toward the nose side, at an end section facing a treating chamber of a conductor rod or bending one part of the conductor rod. CONSTITUTION:Since the nose section of a conductor rod 10 shaped into a resonant cavity 7 is formed in a different diametral section 10A, a diameter of which is increased gradually toward the nose side, the concentration of an electric field by the resonance of microwaves to the nose section of the conductor rod 10 is relaxed positively. Consequently, the distribution of the electric field by the resonance of microwaves, the distribution of microwave energy, is made uniform extending over the whole region of space in the upper section of the surface of a material to be treated 2, the density of plasma 5b shaped by the action of microwave energy is equalized in the diametral direction of the material to be treated 2, and a chemical vapor growth reaction and an etching reaction generated between the plasma 5b and the surface of the material to be treated 2 uniformly progress in each section of said material to be treated 2. Accordingly, the film thickness and state of etching of a thin-film formed onto the material to be treated 2 are equalized in each section of the material to be treated 2.

12. 发明专利

JPS6423536A SPUTTER-ETCHING DEVICE 失效
公开(公告)号：JPS6423536A
公开(公告)日：1989-01-26
申请号：JP17899787
申请日：1987-07-20
申请人： HITACHI LTD
发明人： SAITO YUTAKA , SUZUKI YASUMICHI , SASABE SHUNJI , NAKAJIMA KAZUHIRO
IPC分类号： H01L21/302 , H01L21/3065
摘要： PURPOSE:To make an etching speed faster while a high-density plasma is generated and to eliminate the damage of a substrate by a method wherein the generation of the plasma and a voltage to be used when ions in the plasma collide with the substrate are controlled independently of each other by using separate power supplied. CONSTITUTION:Microwaves generated by using a microwave generation source 10 are sent to a cavity 12 through a waveguide 11. By adjusting a matching means 13, the cavity 12 is matched to a condition of a cavity resonator of the microwaves; an electric field of the microwaves inside the cavity 12 is enhanced; an atmospheric gas inside a tank supplied into a vacuum tank 1 by using a gas supply means 4 is ionized by the microwaves introduced into the vacuum tank 1 through an introduction window 14; a plasma 15 is generated. Ions in the plasma generated in this manner are accelerated by a voltage generated on a substrate 5 via an etching electrode 6 after the high-frequency electric power has been impressed by a power supply 8 connected to the etching electrode 6; the ions collide with the substrate; a sputter-etching operation is executed. By this setup, it is possible to generate the high-density plasma which is symmetrical with reference to an axis and is stable; an etching speed can be made faster; it is possible to reduce the damage of the substrate.

13. 发明专利

JPS6329521A FORMATION OF FILM AND APPARATUS THEREFOR 失效
公开(公告)号：JPS6329521A
公开(公告)日：1988-02-08
申请号：JP17157786
申请日：1986-07-23
申请人： HITACHI LTD
发明人： OWADA NOBUO , HORIUCHI MITSUAKI , SASABE SHUNJI , AKIMORI HIROYUKI
IPC分类号： H01L21/31 , H01L21/768
摘要： PURPOSE:To flatten the surface of a film by CVD stably, by using an apparatus, which is provided with a CVD treating part that can be independently operated and a sputter etching part, forming a film on the surface of a sample, and performing the sputter etching of the surface of the film. CONSTITUTION:A semiconductor wafer 11 is mounted on a wafer mounting electrode 2. The semiconductor wafer 11 is heated to a specified temperature with a heater 6. The inside of a chamber 1 is evacuated to a specified vacuum state with a vacuum pump, which is connected to a pipe 9. Then, power is applied to a shower electrode 3 from a high frequency power source 8a. Reacting gas is made to flow in the shower electrode 3 in the direction of an arrow and supplied into the chamber 1. Thus, a plasma CVD film is formed on the surface of the semiconductor wafer 11. After the film is formed by above described operation, the surface of the film can be flattened by sputter etching when steps are present on the film.

14. 发明专利

JPH1098162A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH1098162A
公开(公告)日：1998-04-14
申请号：JP25074996
申请日：1996-09-20
申请人： HITACHI LTD
发明人： YUNOGAMI TAKASHI , SASABE SHUNJI , SUMUKAI KAZUYUKI , ABE JUN , KUMIHASHI KOSEI , MURAI FUMIO
IPC分类号： G03F7/26 , G03F7/40 , H01L21/02 , H01L21/027 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To prevent a low-steam pressure reaction product from sticking to the side wall of a pattern, when dry-etching a Pt film or a PZT film for forming a specified pattern. SOLUTION: When a Pt film 53 deposited on a semiconductor substrate 50 is dry-etched, a resist mask 54 with its head outside the periphery part rounded in used. After dry-etching, an appropriate amount of over-etching is performed, for completely removing a side wall sticking film 55 remaining on the side surface of pattern. The resist mask 54 is formed by exposing a benzophenone group novolac resist to expose, and after development, and then it is heated, while being irradiated with ultraviolet rays when required for curing.

15. 发明专利

JPH05166905A MONITORING DEVICE FOR JUDGMENT OF SEMICONDUCTOR PROCESS END POINT 失效
公开(公告)号：JPH05166905A
公开(公告)日：1993-07-02
申请号：JP33169991
申请日：1991-12-16
申请人： HITACHI LTD
发明人： USUI TAKETO , SASABE SHUNJI , KATO SEIICHI
IPC分类号： H01L21/203 , H01L21/302 , H01L21/3065 , H01L21/66
摘要： PURPOSE:To judge the end point of a reaction process in an excellently precise manner by a method wherein a fixed volume of beam is projected into a reaction furnace from a light source, and the transmittance of an observation apparatus is computed from the reaction light sent from a light source. CONSTITUTION:A light emission monitoring device is arranged at such a place that a solid wall can be seen through the observation window 2 of the object to be measured (reaction furnace), and at the same time, the light emission monitoring device is composed of a light detector 4, a condenser lens 5, a light source 6 and a half mirror 7. The light, the wavelength and amount of which are controlled by a light source driving device, emitted from the light source 6 is scatteringly reflected by the solid wall, received by the light detector 4, converted into an electric signal by a photoelectric conversion device 9, and it is recorded in a recording device 11 through a computing device 10. The reference value and the transmission factor, when there is not adhering matter of reactive product to the observation window 2, are computed, compered and evaluated. The light emission process can be controlled in a highly precise manner by completely removing the contamination of the observation window in the process of manufacture of a semiconductor.

16. 发明专利

JPH0352234A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0352234A
公开(公告)日：1991-03-06
申请号：JP18849989
申请日：1989-07-20
申请人： HITACHI LTD
发明人： OWADA NOBUO , SASABE SHUNJI , FUJIWARA TAKESHI , AKIMORI HIROYUKI
IPC分类号： H01L21/3205 , H01L21/768
摘要： PURPOSE:To achieve perfect flattening of steps in a wiring Iayer at a high throughput by forming an interlayer insulating film by a step for depositing a CVD insulating film and an etch-back step. CONSTITUTION:An interlayer insulating film is formed by a step for depositing a CVD insulating film 3 and an etch-back step. In the CVD insulating film depositing step, the formation of the CVD insulating film 3 on the side wall part of a pattern on the step side on a semiconductor substrate 2 becomes substantially zero. In the etch-back step, a sputter etching technology and isotropic etching technology are combined. Thus, the interlayer insulating film can be made flat perfectly. Even if wiring layers are stacked, the flatness of the surface of the wiring Iayer is maintained. The reliability of a connecting hole which is conducted through the wiring layers can be improved.

17. 发明专利

JPH0239533A THIN FILM FORMING METHOD AND DEVICE 失效
公开(公告)号：JPH0239533A
公开(公告)日：1990-02-08
申请号：JP18840488
申请日：1988-07-29
申请人： HITACHI LTD
发明人： SUZUKI YASUMICHI , SAITO YUTAKA , SASABE SHUNJI , NAKAJIMA KAZUHIRO
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/31
摘要： PURPOSE:To enable a good quality of film to be accumulated at high speed without doing damage to a substrate by activating plural reaction gases individually in vacuum so as to supply them onto a heated substrate, and accumulating a thin film on the surface, and ionizing gas so as to etch it with low energy ions. CONSTITUTION:An activation chamber 1 and a reaction chamber 2 are evacuated. During that time, a substrate 5 is controlled at the set temperature by a substrate electrode 6. Also, reaction gas hard to be excited is supplied from a first reaction gas supply means 4a to space between the activation chamber 1 and the introduction window 17, and reaction gas easy to be excited is supplied from a second reaction gas supply means 4b to the vicinity of a coupled part between the activation chamber 1 and the reaction chamber 2. Next, the first and second reaction gases are sent into inside of a magnet 18 being a magnetic field generation means. Hereby, microwaves are sent to a cavity 14 through an introduction port 13, and when the microwaves are introduced from the introduction window 17 into inside of a vacuum vessel 7, atmospheric gas is ionized, and plasma 19a and 19b are generated. A thin film is accumulated on the surface of the substrate 5. And by high frequency voltage through a substrate electrode 6 by a power source 10, ions are made low energy for etching.

18. 发明专利

JPS6383257A SPUTTERING DEVICE 失效
公开(公告)号：JPS6383257A
公开(公告)日：1988-04-13
申请号：JP22598586
申请日：1986-09-26
申请人： HITACHI LTD
发明人： SASABE SHUNJI
IPC分类号： H01L21/31 , C23C14/34
摘要： PURPOSE:To prevent the incorporation of an impurity into a vapor deposited film by a target material by coating the target electrode of a sputtering device with the same material as the target material and mounting the target in the state of having no clearance from the target electrode. CONSTITUTION:A semiconductor wafer 4 consisting of Si, etc., is mounted to a wafer electrode 5 in a reduced pressure chamber 1 and the Cu target electrode 3 imposed with the target 2 consisting of SiO2 in the position opposite thereto is connected to a grounded high-frequency power supply 6. The vessel 1 is grounded as well. The Cu target electrode 3 is imposed by an insulating material 7 such as 'Teflon(R)' to the bottom of the vessel 1 and the SiO2 target 2 is imposed thereon. The Cu of the target electrode 3 is extended to the periphery of the front surface of the target 2 by a seat ring 8 consisting of SiO2 which is the same material as the target 2 to coat said surface without any clearance. Ar ions sputter the target electrode 3 as well at the time when the gaseous Ar ions sputter the target 2, but the electrode is coated with the SiO2; therefore, the Cu of the electrode material is not sputtered and the vapor deposited SiO2 film of high purity is formed on the Si wafer 4.

19. 发明专利

JP2003152108A METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 审中-公开
公开(公告)号：JP2003152108A
公开(公告)日：2003-05-23
申请号：JP2002242394
申请日：2002-08-22
申请人： HITACHI LTD
发明人： YUNOGAMI TAKASHI , SASABE SHUNJI , SUKO KAZUYUKI , ABE JUN , KUMIHASHI KOSEI , MURAI FUMIO
IPC分类号： H01L21/3065 , H01L21/3213 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To protect side walls of prescribed circuit patterns from contamination with reaction products having low vapor pressures when the patterns are formed by subjecting a Pt film and a PZT film to dry-etching. SOLUTION: When a Pt film 53 deposited on a semiconductor substrate 50 is subjected to dry-etching, a resist mask 54 is used with head of a rounded outer circumference. Further, overetching with proper depths is practiced after the dry-etching to remove side wall adhering films 55 remaining on the side walls of a circuit pattern completely. The resist mask 54 comprises a benzophenone system novolac resist mask which is, after the exposure and development, heated while an ultraviolet radiation is applied to be cured.

20. 发明专利

JPH10209132A ELIMINATING METHOD OF ORGANIC MATTER 失效
公开(公告)号：JPH10209132A
公开(公告)日：1998-08-07
申请号：JP1222697
申请日：1997-01-27
申请人： HITACHI LTD
发明人： KAWASAKI HIROMICHI , KOIZUMI KOTARO , FUJITO TOSHIAKI , TSUNEKAWA SUKEYOSHI , NOJIRI KAZUO , SASABE SHUNJI
IPC分类号： H01L21/302 , H01L21/027 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To reduce the amount of fluorine left on the surface of a substrate to be treated, by performing a treatment wherein the surface temperature of an organic substance forming polymer containing fluorine is set higher than or equal to the surface temperature generating elimination gas containing fluorine. SOLUTION: A wafer 1 is mounted on a stage 3 in a treatment chamber 2. A heater 4 is built in the stage 3, and the stage surface temperature is controlled to 330 deg.C, with a thermocouple 5 and a temperature controller 6. Mechanism 7 for vacuum-sucking the wafer 1 is installed in the stage 3, and vacuum- sucks the wafer 1 on the stage 3, so that the wafer temperature is controlled equal to the surface temperature of the stage 3. A nozzle 9 for supplying ozone is fixed to the quartz 8. The nozzle 9 is connected with an ozone generator 11 and an ozone concentration meter 12. From material gas whose main component is oxygen gas, ozone is formed and supplied with the ozone generator 11. Ozone concentration is measured with the ozone concentration meter 12, fed back to the generator 11, and controlled. The value is maintained to be 100g/Nm .

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