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1. 发明专利

JP2006039830A Semiconductor integrated circuit 审中-公开
标题翻译：半导体集成电路
公开(公告)号：JP2006039830A
公开(公告)日：2006-02-09
申请号：JP2004217233
申请日：2004-07-26
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： MOMII MASATO , YADA NAOKI , IWABUCHI MASARU
IPC分类号： G06F1/04 , G06F15/78 , H01L21/822 , H01L27/04 , H03K17/14
CPC分类号： H03L7/08
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit for performing an internal oscillation with high precision. SOLUTION: The semiconductor integrated circuit comprises a storage circuit (6); an oscillation circuit (23) for generating an inner clock signal (VCLK), based on control information which is held in the storage circuit; a logic circuit (2) for generating the control information by which the frequency of the inner clock signal is made to coincide with that of an outer clock signal (RCLK); and an electric fuse circuit or meltdown fuse circuit (6cd) for storing the control information which is generated in the logic circuit. The inner clock signal is used for the synchronizing operation of an internal circuit. Even when an error (undesired change) occurs in the oscillation frequency characteristic (oscillation frequency) of the oscillation circuit due to nonuniformity in process, an inner clock signal frequency is made to coincide with the outer clock signal frequency of a target frequency without requiring an external crystal vibrator and the input of the outer clock signal. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于高精度地执行内部振荡的半导体集成电路。解决方案：半导体集成电路包括存储电路（6）; 用于根据保存在所述存储电路中的控制信息产生内部时钟信号（VCLK）的振荡电路（23）; 用于产生使内部时钟信号的频率与外部时钟信号（RCLK）的频率一致的控制信息的逻辑电路（2）; 以及用于存储在逻辑电路中产生的控制信息的电熔丝电路或熔断熔丝电路（6cd）。内部时钟信号用于内部电路的同步操作。即使由于处理不均匀而导致的振荡电路的振荡频率特性（振荡频率）发生错误（不希望的变化），也可以使内部时钟信号频率与目标频率的外部时钟信号频率一致，而不需要外部晶体振荡器和外部时钟信号的输入。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2006140241A Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路设备
公开(公告)号：JP2006140241A
公开(公告)日：2006-06-01
申请号：JP2004327192
申请日：2004-11-11
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： MOMII MASATO , YADA NAOKI , IWABUCHI MASARU
IPC分类号： H01L27/04 , H01L21/82 , H01L21/822
CPC分类号： G11C7/1045 , G11C7/222
摘要： PROBLEM TO BE SOLVED: To reduce the size of a semiconductor integrated circuit device by considerably reducing the circuit area of a control information holding means which holds control information used for the trimming etc., of an analog circuit etc.
SOLUTION: A fuse module 4 which holds the trimming information of an internal oscillating circuit module is composed of information writing fuse circuits 20
1 -20
n in which the trimming information is written by fusing/non-fusing an information writing fuse 25, a reference fuse circuit 20 which discriminates whether the fuse 25 is fused or not, and a current/voltage converter 21. Since the reference fuse circuit 20 and current/voltage converting section 21 are commonly used for the information writing fuse circuits 20
1 -20
n , the circuit area of the fuse module 4 can be reduced significantly.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过显着地减少用于模拟电路等的修整等的控制信息的控制信息保持装置的电路面积，来减小半导体集成电路器件的尺寸。解决方案：保存内部振荡电路模块的修整信息的保险丝模块4由写入修剪信息的信息写入熔丝电路20 -20 n 组成通过融合/不熔化信息写入保险丝25，鉴别熔丝25是否熔断的参考熔丝电路20以及电流/电压转换器21.由于参考熔丝电路20和电流/电压转换部21是通常用于信息写入熔丝电路20 -20 n ，可以显着降低熔丝模块4的电路面积。版权所有（C）2006，JPO＆NCIPI

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