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1. 发明专利

JPH0934583A CLOCK SELECTION CONTROL SYSTEM 失效
公开(公告)号：JPH0934583A
公开(公告)日：1997-02-07
申请号：JP17991895
申请日：1995-07-17
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： G06F1/04 , H04L1/22 , H04L7/00 , H04L12/00
摘要： PROBLEM TO BE SOLVED: To enable a clock selection control system in a digital exchange to supply a signal group into a simplex device in an always stable state even when the signal group supplied from a duplex device is switched. SOLUTION: In a digital exchange provided with a duplex device 100 generating a signal group (SIG) including clocks (CLK) having the same frequency and asynchronous with each other and the same kind of signals (DG) synchronized with each clock and a simplex device 200 incorporating a phase synchronizing circuit 201 receiving the signal groups of two systems from the duplex device, selecting either one system and generating the clock phase-synchronized with a reception clock, a first selection means 300 for switching only a clock at first when the switch request of the signal group is generated and a second selection means 400 for monitoring the phase of the output clock of a phase synchronizing circuit after a clock is switched and switching the signals except the clock after the phase of the clock reaches a prescribed state are provided.

2. 发明专利

JPS63156453A SCANNING SYSTEM FOR SUBSCRIBER LINE 失效
公开(公告)号：JPS63156453A
公开(公告)日：1988-06-29
申请号：JP30453686
申请日：1986-12-19
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H04Q3/72 , H04Q11/04
摘要： PURPOSE:To improve reliability for supervising a subscriber line, by scanning the communication state of each subscriber line by a line concentration multiplexing device autonomously, and detecting the change of the communication state of each subscriber line based on a scanned result transmitted from the line concentration multiplexing device by a time divisional call device, in a time divisional data exchanger. CONSTITUTION:A scan group generating part 29 in the line concentration multiplexing device 2 generates a bit of scan group information (sg) which steps at a prescribed cycle, and transmits it to a subscriber line scanning circuit SCN22 and a gate 26. The SCN22 scans the communication state of the the subscriber line 4 in a group at every transmission of the bit of scan group information (sg) from the part 29, and transmits the scanned result to the gate 26. The time divisional call device 1 receives and analyzes incoming bit of subscriber line scan information (sa), and transmits it to a change detecting part DET18. The DET18 analyzes transmitted bit of subscriber line scan information (sa), and detects the change of the communication state of the subscriber line 4 in the group designated by the bit of scan group information (sg). Therefore, it is possible to monitor the communication state of each subscriber line 4 housed in the line concentration multiplexing device 2 periodically.

3. 发明专利

JPS62176350A ON-LINE PROGRAM DEVELOPMENT SYSTEM 失效
公开(公告)号：JPS62176350A
公开(公告)日：1987-08-03
申请号：JP1860286
申请日：1986-01-30
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： G06F11/28 , H04M3/22 , H04Q1/22
摘要： PURPOSE:To improve the test accuracy of a program and the test efficiency by providing an on-line information collection equipment collecting storage information transferred between a central processing section and a storage section in operation and channel information transferred between the central processing unit and a channel section in operation. CONSTITUTION:The on-line information collection equipment 7 collects the storage information md transferred between the central processing section 1 and the storage section 2 in operation and the channel information sd transferred between the central processing section 1 and the channel section 3 in operation. Thus, no excess load such as the collection processing of the channel information sd is exerted onto the central processing section 1 except the execution of a test object program stored in the storage section 2 and the test is attained in a conventional operating state. Even when an electronic exchange is in operation, the storage information md and the channel information sd collected by the on-line information collection equipment 7 are analyzed at any time in real time and the test accuracy and the test efficiency are improved.

4. 发明专利

JPS6251847A SIGNAL PROCESSING SYSTEM 失效
公开(公告)号：JPS6251847A
公开(公告)日：1987-03-06
申请号：JP19131785
申请日：1985-08-30
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H04J3/00
摘要： PURPOSE:To relax a requested quickness of an arithmetic element by converting a significant signal on a specific time slot to a signal in the frame period to which the significant signal belongs and using the converted signal for the processing in a prescribed processing means. CONSTITUTION:Significant signals on corresponding time slots in individual frames of a burst signal train (a) transmitted through highways HWo...HWn are written in time conversion memories 11o...11n by address signals from write address generating circuits 12o...12n. These data are read out by read address generating circuits 13o...13n and are converted to signals in frame periods to which signals on time slots belong, and converted signals are outputted from time conversion devices 10o...10n. Output signals from devices 10o...10n are multiplexed by an n-multiplex conversion circuit 14 and are sent to a line 15.

5. 发明专利

JPH04365266A FRAME PULSE EXTRACTING SYSTEM FOR HDTV 失效
公开(公告)号：JPH04365266A
公开(公告)日：1992-12-17
申请号：JP14155391
申请日：1991-06-13
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H04N5/10 , H04N7/00 , H04N7/015 , H04N11/00 , H04N11/24 , H04N19/00 , H04N19/85
摘要： PURPOSE:To efficiently execute frame extraction with small limit when exchanging an HD(High Density) TV signal and transmitting it to a terminal. CONSTITUTION:The image signal of HDTV is converted into a luminance signal, the respective components of two color difference signals in blue and red systems are converted into digital signals, and the respective digital signals are multiplexed and supplied to an exchange switch 3. A digital interface part 4 is provided to receive the multiplexed signal outputted from the exchange switch 3, and the digital interface part 4 is constituted so as to separate the luminance signal and the two color difference signals of blue and red systems from a multiplexed digital image data train, to detect the synchronizing signal level of the separated luminance signal, to detect a horizontal pulse and a vertical synchronizing signal and to prepare a frame pulse having prescribed phase difference from the vertical signal.

6. 发明专利

JPS6359039A DATA EXCHANGE LINE EXCHANGE SYSTEM 失效
公开(公告)号：JPS6359039A
公开(公告)日：1988-03-14
申请号：JP20047586
申请日：1986-08-27
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
摘要： PURPOSE:To attain a process note check of an extended data terminal line during on-line operation by providing a memory storing data in response to the service state of each data terminal line to a line concentration multiplexer at the on-line operation. CONSTITUTION:A data representing whether a line is in service or not for each data terminals 31-3n is stored in a memory 17 depending on the application of station condition from a control section 4 at the on-line operation. Then an operation section 8 selects and sets a data terminal line executing the process note check to start a test section 7. A micro-processor 13 reads the setting data of the operation section 8. Then in case of off-duty, a loopback data reflected from a line adaptor section 10 of a selected and set data terminal line are read, the data are collated with the set data by the operation section 8 to check the normality of the process notice in the line adaptor package and the cable in the device or the like and the result of check is displayed on the operation section 8.

7. 发明专利

JPS61292497A CLOCK DISTRIBUTING SYSTEM 失效
公开(公告)号：JPS61292497A
公开(公告)日：1986-12-23
申请号：JP13384685
申请日：1985-06-19
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H04Q11/04 , G06F1/04 , G06F1/10
摘要： PURPOSE:To eliminate a fear that a failure of an optional selecting circuit gives an influence to all load circuits by providing the selecting circuit for selecting a normal one system from two system clock signals in the respective load circuits in a device for receiving the clock signals of the two systems and distributing the normal one system in the plural load circuits. CONSTITUTION:A duplicated clock supply device 1 supplies a clock signal 2 of a CMI type to a two system 3 device to be supplied. A cut off clock detecting circuit 7 monitors a normality of a clock signal of the respective systems and when detecting the stop of the clock signal 5, it transmits a detecting signal 8 to respective selecting circuits 16. The respective selecting circuits 16, based on the detecting signal 8, selects the one system fo the normal clock signal 5, of the clock signals 5 of the two systems transmitted from a clock receiving circuit 4 and supplies to a self-load circuit 10 as a clock signal 19, respectively. Accordingly, even when the optional selecting circuit 16 cannot select the normal system due to the failure, there is not fear that all the load circuits 10 lose the function.

8. 发明专利

JPH0575550A VOICE SIGNAL MULTIPLEXING SYSTEM 失效
公开(公告)号：JPH0575550A
公开(公告)日：1993-03-26
申请号：JP23672191
申请日：1991-09-18
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H04B14/04 , H04J3/00 , H04N5/60 , H04N7/08 , H04N7/081
摘要： PURPOSE:To ensure the effective use of a memory element by dividing the parallel signals of an 8-bit unit inputted by a parallel/serial converter means into the serial signals every 8 bits and then multiplexing these serial signals into the full-bit serial signals through a multiplexing means. CONSTITUTION:The digital voice signals D1-D4 of a 16-bit parallel form equivalent to four channels inputted from an A/D converter circuit 3 are divided into the lower order parallel signals DL and the upper order parallel signals DU every 8 bits. Then a 1st multiplexing part 51 performs the parallel/serial conversion and outputs the signals SL and SU equivalent to four channels. Then the signals SL and SU are multiplexed in time division at a 2nd multiplexing part 52 for production of a multiplex voice signal MA. Thus all signals are processed every 8 bits in a voice multiplexing circuit 5. Therefore a memory element can be effectively used and the economical properties of the circuit 5 can be improved.

9. 发明专利

JPH0444414A CLOCK OSCILLATOR CIRCUIT 失效
公开(公告)号：JPH0444414A
公开(公告)日：1992-02-14
申请号：JP15221290
申请日：1990-06-11
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H03K3/03
摘要： PURPOSE:To realize a clock oscillator circuit having a long cycle and not requiring high accuracy economically by connecting the output terminal of a 1st electronic circuit to the input terminal of a 2nd electronic circuit and connecting the output terminal of the 2nd electronic circuit to the input terminal of the 1st electronic circuit via a polarity inversion circuit. CONSTITUTION:When the level change is given respectively to the input terminals 11, 21 of 1st and 2nd electronic circuits 1, 2, input level detection circuits 12, 22 detect the change in the input level to change a level to time constant circuits 13, 23. The time constant circuits 13, 23 receiving the potential change implement charging or discharging along with a time curve corresponding to their time constant. Output circuits 14, 24 monitor the stored potential of the time constant circuits 13, 23 and change the output potential of themselves from a low to a high level or vice versa when the monitored potential is a preset potential or above or below. Thus, a clock pulse having an on/off time proportional to the time constant of the time constant circuits 13, 23 is outputted from an external output terminal 4.

10. 发明专利

JPH0323753A VOICE ACCUMULATION MESSAGE TRANSFER CONTROL SYSTEM 失效
公开(公告)号：JPH0323753A
公开(公告)日：1991-01-31
申请号：JP15797489
申请日：1989-06-20
申请人： FUJITSU LTD
发明人： KISHINAMI KAZUO
IPC分类号： H04M3/50 , H04M3/42 , H04M3/533
摘要： PURPOSE:To automatically transfer a message by connecting a center at a transfer origin to another center, identifying an MF signal transmitted fromanother center, sending numeric information sequentially accordingly, and accumulating a transferred message in a filing device at the center of a transfer destination. CONSTITUTION:When a transfer request is issued from the center 10 of the transfer origin, an outgoing means 101 sends a PB signal to call the center 12 connected to an exchange in another area by being started up with a control part 105, then, connection is completed. At the center 12, corresponding signals are sent from a guidance instruction sending means 121 and an MF signal sending means 122 for a short time under the control of a control part 125. To the contrary, the signal is identified with an MF signal identification means 102 at the center 10, and the control part 105 sends the numeric information such as a communication number or a password stored in the filing device 104 for a PB signal sending means 103 sequentially corresponding to a result to the center 12 of the transfer destination, and it is stored in the filing device 124. In such a way, the message can automatically be transferred to the center in another area with simple constitution.

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