专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP3369115A1 TRANSISTOR A EFFET DE CHAMP A RENDEMENT ET GAIN OPTIMISE 审中-公开
公开(公告)号：EP3369115A1
公开(公告)日：2018-09-05
申请号：EP16790546.2
申请日：2016-10-27
申请人： Thales , Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： JACQUET, Jean-Claude , GAMARRA, Piero , PIOTROWICZ, Stéphane , LACAM, Cédric , POISSON, Marie-Antoinette , PATARD, Olivier
IPC分类号： H01L29/778 , H01L29/201 , H01L29/20 , H01L29/207
CPC分类号： H01L29/7783 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/207
摘要： The invention relates to a transistor which includes a stack of semiconductor materials including, in particular, a first sub-layer (16), carefully arranged and with a specific thickness, splitting the buffer layer (12) into two portions (12a; 12b) and including a third material (Mat3) so that the difference in the piezoelectric and spontaneous polarisation coefficients between the material of the buffer layer and the third material (Mat3) induces, at a first interface (17) between the first portion of the buffer layer (12a) and the first sub-layer (16), a first fixed surface electric charge generating an electrical field directed along the axis z so as to allow the two-dimensional gas (9) to be contained in the channel.

2. 发明公开

EP2816078A1 Transparent conductive film and electric device 审中-公开
标题翻译： TransparenterleitfähigerFilm und elektrische Vorrichtung
公开(公告)号：EP2816078A1
公开(公告)日：2014-12-24
申请号：EP14184734.3
申请日：2014-02-21
申请人： Kabushiki Kaisha Toshiba
发明人： Naito, Katsuyuki , Yoshinaga, Norihiro , Akasaka, Yoshihiro , Ono, Tomio
IPC分类号： C08J7/06 , C09D5/24 , H01L29/16 , H01L29/201 , B82Y10/00 , B82Y30/00 , H01L31/18 , H01L29/41
CPC分类号： G02F1/13439 , B82Y10/00 , B82Y30/00 , C08J7/06 , C08J2333/08 , C08J2333/10 , C09D5/24 , H01B1/02 , H01B1/04 , H01L29/0673 , H01L29/1606 , H01L29/413 , H01L29/7781 , H01L31/022466 , H01L51/0097 , H01L51/4226 , H01L51/4253 , H01L51/442 , H01L51/5212 , H01L51/5215 , H01L51/529 , Y02E10/549 , Y10T428/269 , Y10T428/30
摘要： According to one embodiment, the transparent conductive film (10) contains a laminated structure including a conductive layer (15) and a transparent polymer layer (16). The conductive layer (15) contains a metal nanowire (14) and a carbon material (13) including grapheme. The transparent polymer layer (16) contains a transparent polymer having a glass transition temperature of 100°C or less. The carbon material (13) constitutes one surface of the transparent conductive film (10).
摘要翻译：根据一个实施例，透明导电膜（10）包含包括导电层（15）和透明聚合物层（16）的层压结构。导电层（15）包含金属纳米线（14）和包括图形的碳材料（13）。透明聚合物层（16）含有玻璃化转变温度为100℃以下的透明聚合物。碳材料（13）构成透明导电膜（10）的一个表面。

3. 发明公开

EP2662882A4 SEMICONDUCTOR ELEMENT AND METHOD FOR PRODUCING SAME 审中-公开
标题翻译：半导体元件及其制造方法
公开(公告)号：EP2662882A4
公开(公告)日：2014-10-29
申请号：EP12785747
申请日：2012-05-10
申请人： FURUKAWA ELECTRIC CO LTD , FUJI ELECTRIC CO LTD
发明人： KOKAWA TAKUYA , KATOU SADAHIRO , IWAMI MASAYUKI , UTSUMI MAKOTO
IPC分类号： H01L21/338 , H01L21/20 , H01L21/205 , H01L29/10 , H01L29/20 , H01L29/201 , H01L29/36 , H01L29/778
CPC分类号： H01L29/06 , H01L21/02458 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/28 , H01L29/1075 , H01L29/2003 , H01L29/201 , H01L29/36 , H01L29/66462 , H01L29/7783 , H01L29/7787

4. 发明公开

EP2507820A4 SEMICONDUCTOR MATERIAL DOPING 有权转让
标题翻译：掺杂半导体材料
公开(公告)号：EP2507820A4
公开(公告)日：2013-10-16
申请号：EP10835241
申请日：2010-12-04
申请人： SENSOR ELECTRONIC TECH INC
发明人： SHATALOV MAXIM S , GASKA REMIGIJUS , YANG JINWEI , SHUR MICHAEL
IPC分类号： H01L29/15 , H01L29/20 , H01L29/201 , H01L33/06 , H01L33/32
CPC分类号： H01L29/122 , B82Y10/00 , H01L29/155 , H01L29/2003 , H01L29/201 , H01L33/06 , H01L33/32

5. 发明公开

EP2498282A1 EPITAXIALLY LAMINATED III-NITRIDE SUBSTRATE 审中-公开
标题翻译： EPITAKTISCH BESCHICHTETES GRUPPE-III-NITRID-SUBSTRAT
公开(公告)号：EP2498282A1
公开(公告)日：2012-09-12
申请号：EP10828104.9
申请日：2010-11-04
申请人： DOWA Electronics Materials Co., Ltd.
发明人： IKUTA, Tetsuya , SHIMIZU, Jo , SHIBATA, Tomohiko
IPC分类号： H01L21/338 , H01L21/205 , H01L29/201 , H01L29/778 , H01L29/812
CPC分类号： H01L29/2003 , H01L21/02381 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L29/155 , H01L29/205
摘要： A Group III nitride epitaxial laminate substrate is provided, which can improve crystallinity of a Group III nitride semiconductor without increasing substrate warpage. A Group III nitride epitaxial laminate substrate comprising: a substrate; a buffer formed on the substrate; and a main laminate formed by epitaxially growing a Group III nitride layer on the buffer, wherein the buffer includes an initial growth layer in contact with the substrate, a first superlattice laminate formed on the initial growth layer, and a second superlattice laminate formed on the first superlattice laminate, the first superlattice laminate includes five to 20 sets of first AlN layers made of an AlN material and second GaN layers made of a GaN material, the first AlN layers and the second GaN layers being alternately stacked, and each one set of the first AlN layer and the second GaN layer has a thickness of less than 44 nm, the second superlattice laminate includes a plurality of sets of first layers made of an AlN material or an AlGaN material and second layers made of an AlGaN material having a different band gap from the first layers, the first and second layers being alternately stacked.
摘要翻译：提供III族氮化物外延层叠基板，其可以在不增加基板翘曲的情况下提高III族氮化物半导体的结晶度。一种III族氮化物外延层叠基板，包括：基板; 形成在衬底上的缓冲液; 以及通过在缓冲器上外延生长III族氮化物层而形成的主层压体，其中所述缓冲器包括与所述基底接触的初始生长层，形成在所述初始生长层上的第一超晶格层压体和形成在所述初始生长层上的第二超晶格层压体第一超晶格层叠体，第一超晶格层叠体包括由AlN材料制成的5至20组第一AlN层和由GaN材料制成的第二GaN层，第一AlN层和第二GaN层交替堆叠，并且每组第一AlN层和第二GaN层具有小于44nm的厚度，第二超晶格层叠包括多组由AlN材料或AlGaN材料制成的第一层和由具有不同的AlGaN材料的AlGaN材料制成的第二层带隙从第一层，第一层和第二层交替堆叠。

6. 发明授权

EP1470592B1 Boron phosphide based semiconductor device 有权
标题翻译： Boronphosphid半导体部件
公开(公告)号：EP1470592B1
公开(公告)日：2010-09-22
申请号：EP03703063.2
申请日：2003-01-28
申请人： Showa Denko K.K.
发明人： UDAGAWA, Takashi, Showa Denko K.K Corporate , YAMASHITA, Tamotsu, Showa Denko K.K. Corporate
IPC分类号： H01L29/04 , H01L29/201 , H01L29/205 , H01L33/30 , H01L33/16
CPC分类号： H01L33/30 , C30B25/02 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/02381 , H01L21/02461 , H01L21/02543 , H01L21/02579 , H01L21/02595 , H01L21/0262 , H01L29/045 , H01L29/201 , H01L33/02 , H01L33/16 , H01L33/18
摘要： A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface of {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, wherein each single crystal entity has a twining interface that forms an angle of 60° relative to a crystal direction of the substrate.

7. 发明公开

EP1593162A4 SEMICONDUCTOR DEVICE, PRODUCTION METHOD THEREOF AND LIGHT-EMITTING DEVICE 审中-公开
标题翻译：半导体元件，及其制造方法的发光器件
公开(公告)号：EP1593162A4
公开(公告)日：2009-01-28
申请号：EP04708877
申请日：2004-02-06
申请人： SHOWA DENKO KK
发明人： UDAGAWA TAKASHI
IPC分类号： H01L21/205 , H01L21/285 , H01L29/201 , H01L29/45 , H01L33/30 , H01S5/323
CPC分类号： H01L33/30 , H01L21/0237 , H01L21/02381 , H01L21/02458 , H01L21/02461 , H01L21/02502 , H01L21/02543 , H01L21/0262 , H01L21/28575 , H01L29/201 , H01L29/452 , H01S5/32308
摘要： A semiconductor device comprising a crystalline substrate, optionally with a crystalline layer formed thereon; a boron monophosphide or monophosphide-based mixed-crystal layer on said crystalline substrate or said crystalline layer formed thereon, said boron monophosphide or boron monophosphide-based mixed-crystal layer comprising a bottom portion of a polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer and an upper surface portion of a single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer; and an Ohmic electrode on said boron monophosphide or boron monophosphide-based mixed-crystal layer, said Ohmic electrode being in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.

8. 发明授权

EP0979529B1 DESIGN AND FABRICATION OF ELECTRONIC DEVICES WITH InAlAsSb/AlSb BARRIER 失效
标题翻译：设计与InAlAsSb /屏障的AlSb电子安排制造
公开(公告)号：EP0979529B1
公开(公告)日：2006-07-12
申请号：EP98913176.8
申请日：1998-03-26
申请人： THE GOVERNMENT OF THE UNITED STATES OF AMERICA, as represented by THE SECRETARY OF THE NAVY
发明人： BOOS, John, Bradley , KRUPPA, Walter , PARK, Daewon , BENNETT, Brian, R.
IPC分类号： H01L29/00 , H01L29/778 , H01L21/306 , H01L29/205 , H01L29/201
CPC分类号： H01L29/205 , H01L29/201 , H01L29/7783
摘要： An electronic device characterized by a GaAs substrate (8) and a base disposed on the substrate, the base comprising InAs channel layer (16), AlSb (18) layer above the channel layer, InxAll-xAslySbl-y layer (20) containing at least In, Al, and As disposed above the AlSb channel layer, InAs cap layer (22) disposed above and in contact with the InxAll-xAsySbl-y layer, AlSb layer (14) disposed below the InAs channel layer and in contact with the substrate, p GaSb layer (12) disposed within the AlSb layer, Schottky gate (28) with a pad disposed on and in contact with the InxAll-xAsySbl-y layer, at least one ohmic contact (24, 26) disposed on the InAs cap layer, and a trench (30) extending through the base to the substrate isolating the gate bonding pad from the device and providing a gate air bridge which prevents contact between the gate and the InAs layer. The gate air bridge fabrication is accomplished by a liquid etchant containing more than half, on volume basis, of concentrated lactic acid or acetic acid with remainder hydrogen peroxide and concentrated hydrofluoric acid. The etchant attacks InAs, InxAll-xAsySbl-y, AlSb, and GaSb but does not attack GaAs and Au-based alloys.

9. 发明公开

EP1659634A2 Transistor bipolaire et procédé de fabrication de ce transistor 审中-公开
标题翻译：双极晶体管和Herstellungsverfahren死了晶体管
公开(公告)号：EP1659634A2
公开(公告)日：2006-05-24
申请号：EP05110847.0
申请日：2005-11-17
申请人： ALCATEL
发明人： Blayac, Sylvain , Scavennec, André
IPC分类号： H01L29/737 , H01L21/331 , H01L29/201 , H01L29/205
CPC分类号： H01L29/205 , H01L29/201 , H01L29/66318 , H01L29/7371
摘要： L'invention propose un transistor bipolaire, comprenant un substrat, des couches d'émetteur, de base et de collecteur et, le cas échéant, des couches de contact. La couche de base est en un matériau GaAsSb. Le transistor présente en outre au moins une couche de transition en un matériau GaInP, entre la couche d'émetteur et la couche de base. La présence et la composition de la couche de transition permettent de modeler le dessin de la bande de conduction du transistor de sorte à en optimiser les performances. En outre, la composition de la couche de transition facilite la fabrication par gravure sélective du transistor.
L'invention concerne également un circuit comprenant un transistor bipolaire selon l'invention.
L'invention propose en outre un procédé de fabrication d'un transistor selon l'invention
摘要翻译：双极晶体管包括：（A）磷化铟（InP）材料的衬底; （B）InP材料的收集层; （C）锑砷化镓（GaAsSb）材料的基层; （D）InP材料的发射极层; 和（E）在发射极层和基极层之间的至少一个磷化铟镓（GaInP）材料的过渡层。还包括独立权利要求：（A）并入该晶体管的电路; 和（B）该晶体管的制造。

10. 发明公开

EP1470592A2 BORON PHOSPHIDE-BASED SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF 有权
标题翻译： Boronphosphid半导体部件
公开(公告)号：EP1470592A2
公开(公告)日：2004-10-27
申请号：EP03703063.2
申请日：2003-01-28
申请人： SHOWA DENKO K.K.
发明人： UDAGAWA, Takashi,Showa Denko K.K Corporate , YAMASHITA, Tamotsu,Showa Denko K.K. Corporate
IPC分类号： H01L29/04 , H01L29/201 , H01L29/205 , H01L33/00 , H01L21/20 , H01L21/205
CPC分类号： H01L33/30 , C30B25/02 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/02381 , H01L21/02461 , H01L21/02543 , H01L21/02579 , H01L21/02595 , H01L21/0262 , H01L29/045 , H01L29/201 , H01L33/02 , H01L33/16 , H01L33/18
摘要： A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface of {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, wherein each single crystal entity has a twining interface that forms an angle of 60° relative to a crystal direction of the substrate.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式