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1. 发明公开

EP2365689A3 Pixel Clock Generating Device and Image Forming Apparatus 审中-公开
标题翻译：像素时钟生成器件和成像装置
公开(公告)号：EP2365689A3
公开(公告)日：2015-12-30
申请号：EP11157611.2
申请日：2011-03-10
申请人： Ricoh Company, Ltd.
发明人： Masui, Naruhiro
IPC分类号： H04N1/053 , G02B26/12 , G03G15/01 , G06K15/12 , H04N1/113 , H04N1/50 , G03G15/04
CPC分类号： H04N1/053 , G02B26/123 , G02B26/127 , G03G15/04072 , G06K15/1219 , H04N1/1135 , H04N1/506 , H04N2201/0471 , H04N2201/04729 , H04N2201/04734 , H04N2201/04744 , H04N2201/04768 , H04N2201/04772 , H04N2201/04774 , H04N2201/04775 , H04N2201/04784 , H04N2201/04789 , H04N2201/04793 , H04N2201/04794 , H04N2201/04798
摘要： A pixel clock generating device includes a time interval detection unit detecting a time interval between a first signal and a second signal in each of cyclically repeating N (≧ 2) time periods; a comparing unit cyclically selecting a target value from N target values corresponding to the N time periods and outputting an error indicating a difference between the detected time interval and the selected target value for each of the N time periods; a frequency calculation unit correcting a frequency of the pixel clock signal based on the error and cyclically generating a frequency specification signal indicating the corrected frequency for each of the N time periods; a high-frequency clock generating unit generating a high-frequency clock signal; and a pixel clock generating unit generating a pixel clock signal based on the frequency specification signal and the high-frequency clock signal.

2. 发明公开

EP1023638A1 APPARATUS FOR A LASER WRITER FOR COMPLEX MICROLITHOGRAPHIC PATTERNS WITH A DELAY CIRCUIT 有权
标题翻译： EINEM LASER-BELICHTUNGSGERÄTFÜRKOMPLEXE MIKROLITHOGRAPHIEMUSTER MIT EINEMVERZÖGERUNGSSCHALTKREIS
公开(公告)号：EP1023638A1
公开(公告)日：2000-08-02
申请号：EP98950562.3
申请日：1998-10-13
申请人： MICRONIC LASER SYSTEMS AB
发明人： SANDSTRÖM, Torbjörn , ODSELIUS, Leif
IPC分类号： G03F7/20 , H04N1/04
CPC分类号： G03F7/704 , H04N1/047 , H04N2201/04784
摘要： The invention relates to a method and an apparatus for producing microlithographic patterns, in particular to the writing of photomasks for and direct writing of computer displays, microelectronic devices, and precision photoetching. It is also applicable to optical devices and a variety of electronic interconnection structures such as multichip modules. Other applications are possible, such as printing and graphics, as well as laser projection displays. More specifically the invention comprises a method and apparatus for writing of lithographic patterns with raster scanning technique comprising the use of an electronic clock to control the modulation of the beam where the placement in the scanning directions of pattern elements is controlled by time delays of at least one clock signal by fractions of a clock period where said clock period is divided into a number of preferably equally spaced delay time values by means of a delay-locked loop (DLL) and a particular delay time value is chosen according to a digital control word.
摘要翻译：本发明涉及一种用于制造微光刻图案的方法和装置，特别涉及写入光掩模和直接写入计算机显示器，微电子器件和精密光刻技术。它也适用于光学器件和各种电子互连结构，如多芯片模块。其他应用是可能的，例如打印和图形，以及激光投影显示器。更具体地，本发明包括一种用光栅扫描技术书写光刻图案的方法和装置，包括使用电子时钟来控制光束的调制，其中图案元素的扫描方向上的放置由至少的时间延迟控制一个时钟信号通过延迟锁定环（DLL）将所述时钟周期分成多个优选等间隔的延迟时间值的时钟周期的分数，并且根据数字控制字来选择特定的延迟时间值。

3. 发明公开

EP0789483A3 Variable phase clock generator for an electrophotographic printer 失效
标题翻译：与电子照相打印机可变相位时钟发生器
公开(公告)号：EP0789483A3
公开(公告)日：2000-05-31
申请号：EP96113552.2
申请日：1996-08-23
申请人： Hewlett-Packard Company
发明人： Morrison, Robert D.
IPC分类号： H04N1/053
CPC分类号： H04N1/053 , G06K15/1219 , H04N1/1135 , H04N1/12 , H04N2201/02439 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04784 , H04N2201/04794
摘要： An electrophotographic printer includes a photoreceptor on a drum or belt, a laser beam that is reciprocally scanned thereacross, a beam detect signal circuit for generating a beam detect signal and an asynchronous clock oscillator for generating clock pulses. The printer also includes circuitry for generating a plurality of clock signals that are phase synchronized with the beam detect signal. The circuitry includes a tapped delay line (10) for receiving the asynchronous clock pulses, each tap outputting a delayed clock pulse train. A register/selector (12,14,20,22) circuit is coupled to the taps and is responsive to a transition of the beam detect signal for determining a tap which outputs a 0° phase clock transition that is closely proximate to the beam detect signal. Phase delay logic (42) provides signals indicative of which taps of the delay line circuit (10) manifest clock pulse trains that are closest in time to leading and lagging edges of a 0° phase clock pulse, respectively. The phase delay logic circuit (42) further determines taps of the delay line circuit (10) that are intermediate the aforesaid taps and which of those taps should be utilized to provide delayed clock signals of a fractional phase. Signals from the selected taps are thereafter switched to output circuits.

4. 发明公开

EP0998115A2 Clock pulse generating circuit 有权
标题翻译： Taktimpulsgeneratorschaltung
公开(公告)号：EP0998115A2
公开(公告)日：2000-05-03
申请号：EP99118890.5
申请日：1999-09-24
申请人： KONICA CORPORATION
发明人： Takaki, Kouichi , Azumai, Mitsuo , Izumiya, Kenji
IPC分类号： H04N1/053
CPC分类号： H04N1/053 , H04N1/1135 , H04N1/12 , H04N2201/02439 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04784 , H04N2201/04794
摘要： An image forming apparatus is provided with an image forming device to scan in a main scanning direction in synchronization with dot clock pulses for each scanning line so as to form an image; a basic clock pulse generating section to generate basic clock pulses with a predetermined interval; a delayed clock pulse generating section to generate a group of plural delayed clock pulses having different phases respectively by delaying the basic clock pulse into plural delay stages; a synchronism detecting section to detect at least two delayed clock pulses synchronizing with an index signal from the plural delayed clock pulses; a calculating section to calculate a number of delay stages existing within a given time period on the basis of the two synchronizing delayed clock pulses; and a clock pulse control section to selecting the delayed clock pulses sequentially delayed from the synchronizing delayed clock pulse from the group of plural delayed clock pulses within a predetermined time period on the basis of the calculated number of delay stages so as to control a number of clock pulses outputted as the dot clock pulses during the predetermined time period.
摘要翻译：图像形成装置设置有图像形成装置，用于与主扫描方向同步地扫描每个扫描线的点时钟脉冲，以形成图像; 基本时钟脉冲发生部分，用于产生具有预定间隔的基本时钟脉冲; 延迟时钟脉冲发生部分，通过将基本时钟脉冲延迟到多个延迟级来分别产生具有不同相位的多个延迟时钟脉冲的组; 同步检测部分，用于检测与来自多个延迟时钟脉冲的索引信号同步的至少两个延迟时钟脉冲; 计算部分，用于基于两个同步延迟时钟脉冲计算给定时间段内存在的延迟级数; 以及时钟脉冲控制部，其基于计算出的延迟级数，从预定时间段内的多个延迟时钟脉冲群中选择从同步延迟时钟脉冲顺序延迟的延迟时钟脉冲，以控制数量在预定时间段期间作为点时钟脉冲输出的时钟脉冲。

5. 发明公开

EP0789483A2 Variable phase clock generator for an electrophotographic printer 失效
标题翻译：德拉克（Takucker），德克鲁斯（Drucker）
公开(公告)号：EP0789483A2
公开(公告)日：1997-08-13
申请号：EP96113552.2
申请日：1996-08-23
申请人： Hewlett-Packard Company
发明人： Morrison, Robert D.
IPC分类号： H04N1/053
CPC分类号： H04N1/053 , G06K15/1219 , H04N1/1135 , H04N1/12 , H04N2201/02439 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04784 , H04N2201/04794
摘要： An electrophotographic printer includes a photoreceptor on a drum or belt, a laser beam that is reciprocally scanned thereacross, a beam detect signal circuit for generating a beam detect signal and an asynchronous clock oscillator for generating clock pulses. The printer also includes circuitry for generating a plurality of clock signals that are phase synchronized with the beam detect signal. The circuitry includes a tapped delay line (10) for receiving the asynchronous clock pulses, each tap outputting a delayed clock pulse train. A register/selector (12,14,20,22) circuit is coupled to the taps and is responsive to a transition of the beam detect signal for determining a tap which outputs a 0° phase clock transition that is closely proximate to the beam detect signal. Phase delay logic (42) provides signals indicative of which taps of the delay line circuit (10) manifest clock pulse trains that are closest in time to leading and lagging edges of a 0° phase clock pulse, respectively. The phase delay logic circuit (42) further determines taps of the delay line circuit (10) that are intermediate the aforesaid taps and which of those taps should be utilized to provide delayed clock signals of a fractional phase. Signals from the selected taps are thereafter switched to output circuits.
摘要翻译：电子照相打印机包括在感光鼓或皮带上的感光体，在其上往复扫描的激光束，用于产生光束检测信号的光束检测信号电路和用于产生时钟脉冲的异步时钟振荡器。打印机还包括用于产生与光束检测信号相位同步的多个时钟信号的电路。电路包括用于接收异步时钟脉冲的抽头延迟线（10），每个抽头输出延迟的时钟脉冲串。寄存器/选择器（12,14,20,22）电路耦合到抽头，并且响应于光束检测信号的转变，用于确定输出与光束检测非常接近的0度相位时钟转变的抽头信号。相位延迟逻辑（42）提供指示延迟线电路（10）的哪些抽头分别表示时间上与0度相位时钟脉冲的前沿和滞后沿最接近的时钟脉冲串的信号。相位延迟逻辑电路（42）进一步确定延迟线电路（10）的中间在上述抽头之间的抽头，并且这些抽头中的哪一个应用于提供分数阶段的延迟时钟信号。然后将来自所选抽头的信号切换到输出电路。

6. 发明公开

EP2326511A4 PIXEL CLOCK GENERATOR AND IMAGE FORMING APPARATUS 有权
标题翻译： PIXEL频率发生器及摄像装置
公开(公告)号：EP2326511A4
公开(公告)日：2012-03-14
申请号：EP09814706
申请日：2009-09-15
申请人： RICOH CO LTD
发明人： MASUI NARUHIRO
IPC分类号： B41J2/44 , G02B26/12 , H04N1/053 , H04N1/113
CPC分类号： H04N1/053 , G02B26/127 , G03G15/043 , G06K15/1219 , H04N1/1135 , H04N1/12 , H04N2201/0082 , H04N2201/02439 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04772 , H04N2201/04784 , H04N2201/04786 , H04N2201/04794
摘要： A pixel clock generator includes a frequency divider 4 that generates a pixel clock PCLK based on a high frequency clock VCLK, a comparator 5 that calculates an error Lerr in the time obtained by integrating a cycle of the pixel clock PCLK for a target number RefN from a time when synchronization signals SPSYNC and EPSYNC are detected, a filter 6, and a frequency calculating unit 7 that sets a frequency dividing value M of the frequency divider 4. The filter 6 and the frequency calculating unit 7 calculate an average of a frequency of the pixel clock PCLK based on the error Lerr, determine a reference error value from the error Lerr in N-cycles, calculate offset values of the frequencies of N pieces of pixel clocks PCLK based on a difference between the reference error value and the error Lerr, and calculate the frequency dividing value M based on a result obtained by adding the circularly selected offset values and the average of the frequency of the pixel clock PCLK.

7. 发明授权

EP1293842B9 Method and apparatus for image forming capable of effectively justifying an image recording start position 有权
标题翻译：能够有效证明图像记录开始位置的图像形成方法和设备
公开(公告)号：EP1293842B9
公开(公告)日：2007-10-03
申请号：EP02016202.0
申请日：2002-07-18
申请人： Ricoh Company, Ltd.
发明人： Maeda, Katsuhiko, Ricoh Company, Ltd.
IPC分类号： G03G15/01 , G03G15/043 , H04N1/053
CPC分类号： H04N1/506 , G06K15/1219 , H04N1/053 , H04N1/1135 , H04N1/12 , H04N2201/02439 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04784 , H04N2201/04786 , H04N2201/04794
摘要： An image forming apparatus includes at least one image forming mechanism configured to form an image based on image data. Each image forming mechanism includes an optical system, a sensor, an electronic circuit, and a controller. The optical system scans a photosensitive member with a light beam based on image data. The sensor detects the light beam and the electronic circuit stores a correction data table containing light amount data of the light source and corresponding start position shift amount data. The controller controls a light amount of the light source and adjusts a start position of image recording on the photosensitive member in accordance with a sync detect signal. The controller includes a write start position correction unit that adjust the start position of the image recording based on a start position shift amount data when the light amount varies.

8. 发明公开

EP0998115A3 Clock pulse generating circuit 有权
标题翻译：时钟脉冲发生电路
公开(公告)号：EP0998115A3
公开(公告)日：2002-10-30
申请号：EP99118890.5
申请日：1999-09-24
申请人： KONICA CORPORATION
发明人： Takaki, Kouichi , Azumai, Mitsuo , Izumiya, Kenji
IPC分类号： H04N1/053
CPC分类号： H04N1/053 , H04N1/1135 , H04N1/12 , H04N2201/02439 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04784 , H04N2201/04794
摘要： An image forming apparatus is provided with an image forming device to scan in a main scanning direction in synchronization with dot clock pulses for each scanning line so as to form an image; a basic clock pulse generating section to generate basic clock pulses with a predetermined interval; a delayed clock pulse generating section to generate a group of plural delayed clock pulses having different phases respectively by delaying the basic clock pulse into plural delay stages; a synchronism detecting section to detect at least two delayed clock pulses synchronizing with an index signal from the plural delayed clock pulses; a calculating section to calculate a number of delay stages existing within a given time period on the basis of the two synchronizing delayed clock pulses; and a clock pulse control section to selecting the delayed clock pulses sequentially delayed from the synchronizing delayed clock pulse from the group of plural delayed clock pulses within a predetermined time period on the basis of the calculated number of delay stages so as to control a number of clock pulses outputted as the dot clock pulses during the predetermined time period.

9. 发明公开

EP1239656A1 Method and apparatus for image forming with multiple laser beams 审中-公开
标题翻译： Verfahren undGerätzur Bilderzeugung mit mehreren Laserstrahlen
公开(公告)号：EP1239656A1
公开(公告)日：2002-09-11
申请号：EP02251631.4
申请日：2002-03-07
申请人： Ricoh Company, Ltd.
发明人： Yoshiharu, Niito
IPC分类号： H04N1/047
CPC分类号： H04N1/047 , H04N1/1135 , H04N2201/0471 , H04N2201/04784
摘要： An image forming apparatus 4 includes a light source 20, a light beam controlling mechanism 24, a sensor 29, and a signal controller 40. The light source 20 emits parallel light beams with an angle smaller than 90 degrees relative to a subscanning direction. The light beam controlling mechanism controls 24 a scanning of the light beams. The sensor 29 detects one of the light beams and generates a line synchronous signal. The signal controller 40 delays the data streams and generates PLL clock signals which is divided into different clock signals having a same frequency and having phases sequentially varied. The signal controller 40 selects one of the different clock signals and drives the light source with the selected clock signal.
摘要翻译：图像形成装置4包括光源20，光束控制机构24，传感器29和信号控制器40.光源20相对于副扫描方向发射具有小于90度的平行光束。光束控制机构控制光束的扫描。传感器29检测光束中的一个并产生线路同步信号。信号控制器40延迟数据流并产生PLL时钟信号，PLL时钟信号被分成具有相同频率且相位顺序变化的不同时钟信号。信号控制器40选择不同时钟信号中的一个并用所选择的时钟信号驱动光源。

10. 发明公开

EP1148701A2 Clock generating device 审中-公开
标题翻译： Takterzeugungsgerät
公开(公告)号：EP1148701A2
公开(公告)日：2001-10-24
申请号：EP01108392.0
申请日：2001-04-03
申请人： KONICA CORPORATION
发明人： Takagi, Kouichi , Yoshino, Takeshi
IPC分类号： H04N1/053
CPC分类号： H04N1/053 , H04N1/1135 , H04N1/12 , H04N2201/04784
摘要： A clock generating device, comprises a clock producing section to produce plural clocks differing in phase; and a selecting section to select and output a first clock from the plural clocks and to switch from the first clock to a second clock having a phase or a cycle period each differing from that of the first clock during a period that the first clock is being outputted.
摘要翻译：一种时钟产生装置，包括产生时钟不同相位的多个时钟的时钟产生部分; 以及选择部分，用于从所述多个时钟中选择并输出第一时钟，并且在所述第一时钟为第一时钟的时段期间从所述第一时钟切换到具有与所述第一时钟不同的相位或周期周期的第二时钟输出。

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