专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

EP1530822B1 ANORDNUNG ZUR DIGITAL-ANALOG-WANDLUNG EINES HOCHFREQUENTEN DIGITALEN EINGANGSSIGNALS IN EIN TRÄGERFREQUENTES ANALOGES AUSGANGSSIGNAL 有权
标题翻译：安排用于高频数字输入信号的在载体-模拟输出数字 - 模拟转换
公开(公告)号：EP1530822B1
公开(公告)日：2006-09-06
申请号：EP03793654.9
申请日：2003-07-28
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： FUCHS, Armin , JELONNEK, Björn , WOLFF, Gunter
IPC分类号： H03M1/00
CPC分类号： H03M1/0626 , H03M1/66 , H03M1/74 , H03M3/396 , H03M3/41 , H03M3/504
摘要： The configuration for the digital-analog conversion comprises a delay device having at least one first delay element, whereby optional additional delay elements are connected downstream from the first in a serially consecutive manner. The digital input signal is connected to an input of the first delay element and is connected to an input of a first D/A converter. The first delay element is connected on the output side to an input of another D/A converted assigned thereto. The optional additional delay elements are each connected on the output side to an input of another D/A converter assigned to the respective delay element. All D/A converters are combined on the output side in a step-by-step manner so that output signals of all D/A converters form the analog output signal. A specific coefficient is assigned to each D/A converter, and a specific delay time is assigned to each delay element whereby realizing a filter characteristic.

2. 发明授权

EP2963827B1 DELTA SIGMA MODULATOR AND COMMUNICATION DEVICE 有权
标题翻译： DELTA SIGMA调制器和通信设备
公开(公告)号：EP2963827B1
公开(公告)日：2018-05-09
申请号：EP14757208.5
申请日：2014-02-27
申请人： Sumitomo Electric Industries, Ltd.
发明人： MAEHATA, Takashi
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/422 , H03M3/32 , H03M3/396 , H03M3/402 , H03M3/43
摘要： A delta-sigma modulator capable of outputting an output signal including a plurality of signals having different frequencies. The delta-sigma modulator includes: a plurality of input ports to which a plurality of input signals having different frequencies are inputted, respectively; a plurality of loop filters provided corresponding to the plurality of input ports, respectively; an adder configured to add outputs of the plurality of loop filters; and a quantizer configured to quantize an output of the adder. The plurality of loop filters each receive the input signal inputted to the corresponding input port and a feedback signal of an output of the quantizer. The plurality of loop filters each have a characteristic of stopping noise in the vicinity of a frequency of the input signal inputted to the corresponding input port.

3. 发明公开

EP1391992A1 Anordnung zur Digital-Analog-Wandlung eines hochfrequenten digitalen Eingangssignals in ein trägerfrequentes analoges Ausgangssignal 审中-公开
标题翻译：对于高频数字输入信号的数字 - 模拟转换成载频模拟输出信号的排列
公开(公告)号：EP1391992A1
公开(公告)日：2004-02-25
申请号：EP02018602.9
申请日：2002-08-19
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： Fuchs, Armin, Dr. , Jelonnek, Björn, Dr. , Wolff, Gunter, Dr.
IPC分类号： H03M1/00
CPC分类号： H03M1/0626 , H03M1/66 , H03M1/74 , H03M3/396 , H03M3/41 , H03M3/504
摘要： Die Anordnung zur Digital-Analog-Wandlung weist eine Verzögerungseinrichtung mit mindestens einem ersten Verzögerungsglied auf, wobei gegebenenfalls weitere Verzögerungsglieder dem ersten seriell aufeinanderfolgend nachgeschaltet sind. Das digitale Eingangssignal ist einerseits an einen Eingang des ersten Verzögerungsglieds und andererseits an einen Eingang eines ersten D/A-Wandlers angeschaltet. Das erste Verzögerungsglied ist ausgangsseitig mit einem Eingang eines ihm zugeordneten weiteren D/A-Wandlers verbunden. Die gegebenenfalls weiteren Verzögerungsglieder sind jeweils ausgangsseitig mit einem Eingang eines dem jeweiligen Verzögerungsglied zugeordneten weiteren D/A-Wandlers verbunden. Alle D/A-Wandler werden ausgangsseitig stufenweise derart zusammengefasst sind, dass Ausgangssignale aller D/A-Wandler das analoge Ausgangssignal bilden. Jedem D/A-Wandler wird ein spezifischer Koeffizient und jedem Verzögerungsglied wird eine spezifische Verzögerungszeit derart zugeordnet, dass eine Filtercharakteristik realisiert wird.
摘要翻译：该装置具有至少一个第一延迟元件的延迟器件。该输入信号被馈送到第一延迟元件的输入端和一个第一数字 - 模拟转换器DAC或的。延迟元件输出被输入到相关联的DAC。所有DAC输出被组合为它们的输出信号形成模拟信号。每个DAC具有特定的系数和每个延迟元件的特定的延迟时间，以形成一个滤波器特性。该装置具有延迟装置（VZ）具有至少一个第一延迟元件（VG1，..）并且进一步串联的延迟元件。的输入信号（DE）被馈送到第一延迟元件的输入端和一个第一数字到模拟转换器（WD）的。第一和可能的进一步的延迟元件输出被输入到相关联的数字到模拟转换器。所有数字至模拟转换器输出被组合作为它们的输出信号形成模拟信号。每个数模转换器具有特定的系数（k 0，..）并且每个延迟元件的特定延迟时间（t1，...），以形成一滤波器特性。

4. 发明公开

EP3261258A1 TUNABLE BANDPASS SIGMA-DELTA MODULATOR 审中-公开
标题翻译：可调带通SIGMA-DELTA调制器
公开(公告)号：EP3261258A1
公开(公告)日：2017-12-27
申请号：EP16305763.1
申请日：2016-06-23
申请人： Université Pierre et Marie Curie , CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
发明人： ABOUSHADY, Hassan , BADRAN, Tamer , SAYED, Alhassan
IPC分类号： H03M3/00
CPC分类号： H03M3/402 , H03M3/396 , H03M3/424 , H03M3/43 , H04B1/0014 , H04B1/0021
摘要： A Sigma-Delta (ΣΔ) modulator for converting an analog input signal having a frequency bandwidth around a variable center frequency f 0 to a digital output signal at a sampling frequency f s . The ΣΔ modulator comprises a quantizer (420) for generating the digital output signal and a loop filter for shaping the quantization noise. The loop filter comprises at least one subfilter (430, 410) centered around a frequency f 0 and constant noise shaping coefficients (451, 452, 453). The ΣΔ modulator further comprises a tunable delay element (455), a frequency adjuster (480) for adjusting the sampling frequency f s such that the normalized center frequency f 0 / f s is constant, and a delay adjuster (490) for adjusting the loop delay t d implemented by the quantizer and the tunable delay element (455), such that the normalized loop delay t d / T s falls in a predetermined range [ t min , t max ], where T s = = 1/ f s .
摘要翻译：一个Sigma-Delta（ΣΔ）调制器，用于以采样频率fs将具有围绕可变中心频率f0的频率带宽的模拟输入信号转换为数字输出信号。 ΣΔ调制器包括用于产生数字输出信号的量化器（420）和用于整形量化噪声的环路滤波器。环路滤波器包括以频率f0和恒定噪声整形系数（451,452,453）为中心的至少一个子滤波器（430,410）。 ΣΔ调制器进一步包括可调延迟元件（455），用于调整采样频率fs使得归一化中心频率f0 / fs恒定的频率调整器（480），以及用于调整循环延迟td的延迟调整器（490）由量化器和可调延迟元件（455）实现，使得归一化环路延迟td / Ts落入预定范围[tmin，tmax]中，其中Ts = 1 / fs。

5. 发明授权

EP1604458B1 MIXED TECHNOLOGY MEMS/BICMOS LC BANDPASS SIGMA-DELTA FOR DIRECT RF SAMPLING 有权
标题翻译：混合技术的MEMS / BiCMOS工艺LC带通Σ-Δ扫描频率对直接RADIO
公开(公告)号：EP1604458B1
公开(公告)日：2011-12-07
申请号：EP04710707.3
申请日：2004-02-12
申请人： RAYTHEON COMPANY
发明人： LINDER, Lloyd F.
IPC分类号： H03M3/02
CPC分类号： H03M3/408 , H03M3/396 , H03M3/43 , H03M3/454
摘要： An improved sigma-delta modulator is disclosed. The sigma-delta modulator (100) utilizes Micro Electro Mechanical System (MEMS) technology coupled with on-chip LC networks (110,118). MEMS switches are used to switch capacitors and inductors in and out of the network to alter the center frequency and tuning range of the sigma-delta modualtor (100), thus eliminating active components in each LC network (110,118). Furthermore, the use of MEMS switches improves the Q of each LC network (110,118) relative to previous on-chip sigma-delta modualtor designs. The increased Q of each LC network (110,118) reduces or eliminates the need for active Q-enhancement circuitry and improves the inherent filter shape within the loop of the sigma-delta modulator (100). In addition, the distortion of active compoenmtns with the loops (146,146', 148, 148') of the sigma-delta modulator (100) also is improved. The addition of a decimator 252 to the chip presents a complete single chip LC sigma-delta analog-to-digital converter 250.

6. 发明公开

EP1683273A1 DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER 审中-公开
标题翻译： Δ-Σ模数转换器
公开(公告)号：EP1683273A1
公开(公告)日：2006-07-26
申请号：EP04795767.5
申请日：2004-10-20
申请人： NORTHROP GRUMMAN CORPORATION
发明人： ROBINSON, Ian
IPC分类号： H03M3/04
CPC分类号： H03M3/428 , H03M3/396 , H03M3/464
摘要： Systems and methods are provided for providing feedback to a delta-sigma analog-to-digital converter assembly. A noise shaper preprocesses an analog input signal according to an analog feedback signal and an associated transfer function. A quantizer converts the preprocessed analog input signal into a digital output signal. A delta-sigma modulator shapes noise within a sample of the digital output signal. A digital-to-analog converter converts the shaped digital signal into an analog signal to provide the analog feedback signal.

7. 发明公开

EP0815651A1 A DELTA-SIGMA ($g(D)$g(S)) MODULATOR HAVING A DYNAMICALLY TUNABLE CONTINUOUS TIME Gm-C ARCHITECTURE 失效
标题翻译：具有动态可调时间上连续的GM-C-STRUCTUREΔ-Σ调制
公开(公告)号：EP0815651A1
公开(公告)日：1998-01-07
申请号：EP97904768.0
申请日：1997-01-17
申请人： HE HOLDINGS, INC. dba HUGHES ELECTRONICS
发明人： JENSEN, Joseph, F. , RAGHAVAN, Gopal , COSAND, Albert, E.
IPC分类号： H03M3
CPC分类号： H03M3/396 , H03M3/406 , H03M3/43 , H03M3/454
摘要： A continuous-time tunable Gm-C architecture for a ΔΣ modulator (10) includes a tunable resonator (18) and a low bit, high sample rate quantizer (22) connected in a feedback loop (27). The resonator shapes the quantization noise spectrum so that the bulk of the quantization noise occurs outside the signal spectrum. A tunable Gm cell (30) tunes the resonator's resonant frequency to the signal spectrum's carrier frequency to maximize the modulato's SNR. The tunable Gm cell includes a fixed Gm cell (80) having transconductance Gf, a current divider (82), and a recombination circuit (83) that together effectively multiply Gf by a factor α, where -1≤α≤1, without effecting the cell's common mode current Icm. A positive current source (21a, 21b) supplies Icm, while maintaining a common mode resistance of R/2 and a theoretically infinite differential mode resistance. Thus, the resonator's resonant frequency can be varied from DC to approximately 1 Ghz while maintaining a stable common mode operating point and improving the modulator's quality factor.

8. 发明公开

EP2963827A4 DELTA SIGMA MODULATOR AND COMMUNICATION DEVICE 有权
标题翻译： Δ-Σ调制器和通信设备
公开(公告)号：EP2963827A4
公开(公告)日：2016-09-14
申请号：EP14757208
申请日：2014-02-27
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： MAEHATA TAKASHI
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/422 , H03M3/32 , H03M3/396 , H03M3/402 , H03M3/43
摘要： A delta-sigma modulator capable of outputting an output signal including a plurality of signals having different frequencies. The delta-sigma modulator includes: a plurality of input ports to which a plurality of input signals having different frequencies are inputted, respectively; a plurality of loop filters provided corresponding to the plurality of input ports, respectively; an adder configured to add outputs of the plurality of loop filters; and a quantizer configured to quantize an output of the adder. The plurality of loop filters each receive the input signal inputted to the corresponding input port and a feedback signal of an output of the quantizer. The plurality of loop filters each have a characteristic of stopping noise in the vicinity of a frequency of the input signal inputted to the corresponding input port.

9. 发明公开

EP2963827A1 DELTA SIGMA MODULATOR AND COMMUNICATION DEVICE 有权
标题翻译：三角洲调制解调员驻莫桑比克大使馆
公开(公告)号：EP2963827A1
公开(公告)日：2016-01-06
申请号：EP14757208.5
申请日：2014-02-27
申请人： Sumitomo Electric Industries, Ltd.
发明人： MAEHATA, Takashi
IPC分类号： H03M3/02
CPC分类号： H03M3/422 , H03M3/32 , H03M3/396 , H03M3/402 , H03M3/43
摘要： A delta-sigma modulator capable of outputting an output signal including a plurality of signals having different frequencies. The delta-sigma modulator includes: a plurality of input ports to which a plurality of input signals having different frequencies are inputted, respectively; a plurality of loop filters provided corresponding to the plurality of input ports, respectively; an adder configured to add outputs of the plurality of loop filters; and a quantizer configured to quantize an output of the adder. The plurality of loop filters each receive the input signal inputted to the corresponding input port and a feedback signal of an output of the quantizer. The plurality of loop filters each have a characteristic of stopping noise in the vicinity of a frequency of the input signal inputted to the corresponding input port.
摘要翻译：能够输出包括具有不同频率的多个信号的输出信号的Δ-Σ调制器。 Δ-Σ调制器包括：分别输入多个具有不同频率的输入信号的多个输入端口; 分别与所述多个输入端口对应地设置的多个环路滤波器; 加法器，被配置为添加所述多个环路滤波器的输出; 以及量化器，被配置为量化加法器的输出。多个环路滤波器各自接收输入到相应输入端口的输入信号和量化器的输出的反馈信号。多个环路滤波器各自具有在输入到相应的输入端口的输入信号的频率附近停止噪声的特性。

10. 发明授权

EP2592756B1 Analog-to-digital converter 有权
标题翻译：模拟Digitalumsetzer
公开(公告)号：EP2592756B1
公开(公告)日：2014-05-07
申请号：EP11189057.0
申请日：2011-11-14
申请人： Telefonaktiebolaget L M Ericsson AB (Publ)
发明人： Anderson, Martin , Sundström, Lars
IPC分类号： H03M3/02
CPC分类号： H03M3/396 , H03M3/374 , H03M3/436 , H03M3/454 , H03M3/458 , H03M3/464 , H04B1/16 , H04W88/02 , H04W88/08

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式