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1. 发明公开

EP1845618A1 CLOCK BUFFER 审中-公开
标题翻译： TAKTPUFFER
公开(公告)号：EP1845618A1
公开(公告)日：2007-10-17
申请号：EP05709760.2
申请日：2005-02-04
申请人： Fujitsu Ltd.
发明人： KIBUNE, Masaya c/o FUJITSU LIMITED
IPC分类号： H03K5/01 , G06F1/04 , H03H11/04
CPC分类号： H03F3/45183 , H03F3/45197 , H03F3/45475 , H03F2203/45138 , H03F2203/45458 , H03F2203/45461 , H03F2203/45466 , H03F2203/45506 , H03F2203/45652 , H03H11/34
摘要： To reduce noise at frequencies below the fundamental frequency of a clock and to suppress a DC component included in the clock.
A clock buffer (1) has a band-pass frequency characteristic, in which a pass band of the buffer includes a fundamental frequency (f0) of a clock (CLK1) and a gain for attenuating signals, that is, a gain of less than 0 dB is provided at frequencies below the pass band. Therefore, the clock buffer can output a clock (CLK2) reduced in noise at frequencies below the fundamental frequency (f0) of the clock (CLK1). Further, the clock buffer can output the clock (CLK2) suppressed in a DC component (offset voltage) included in the clock (CLK1).
摘要翻译：降低频率低于时钟基频的噪声，并抑制时钟中包含的直流分量。时钟缓冲器（1）具有带通频率特性，其中缓冲器的通带包括时钟（CLK1）的基频（f0）和用于衰减信号的增益，即增益小于在低于通带的频率处提供0dB。因此，时钟缓冲器可以输出在低于时钟（CLK1）的基频（f0）的频率处降低噪声的时钟（CLK2）。此外，时钟缓冲器可以输出在时钟（CLK1）中包括的DC分量（偏移电压）中抑制的时钟（CLK2）。

2. 发明公开

EP2353220A1 ACTIVE-TIME DEPENDENT BIAS CURRENT GENERATION FOR SWITCHED-CAPACITOR CIRCUITS 有权
标题翻译：关于电路活动时间依赖性VORMAGNETISIERUNGSSTROMERZEUGUNG容量SWITCHED
公开(公告)号：EP2353220A1
公开(公告)日：2011-08-10
申请号：EP09792677.8
申请日：2009-09-17
申请人： QUALCOMM Incorporated
发明人： LEE, Chun C.
IPC分类号： H03F1/02 , H03F3/00 , H03F3/45
CPC分类号： H03F3/45183 , H03F1/0261 , H03F3/005 , H03F2203/45166 , H03F2203/45244 , H03F2203/45321 , H03F2203/45461 , H03F2203/45466 , H03F2203/45471 , H03F2203/45512 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616 , H03F2203/45674
摘要： Exemplary embodiments of the disclosure include adaptively generating a bias current for a switched-capacitor circuit. An exemplary apparatus includes a first phase signal and a second phase signal operating at a sampling rate. An asserted time of the first phase signal and an asserted time of the second phase signal are separated by a predefined non-overlap time. The apparatus also includes a switched-capacitor circuit with a plurality of switched capacitors operably coupled to the first phase signal and the second phase signal. An amplifier is operably coupled to the switched-capacitor circuit and has a response time inversely proportional to an adaptive bias current. A bias generator is coupled to the amplifier and operates to modify the adaptive bias current responsive to the asserted time of the first phase signal.

3. 发明授权

EP2353220B1 ACTIVE-TIME DEPENDENT BIAS CURRENT GENERATION FOR SWITCHED-CAPACITOR CIRCUITS 有权
标题翻译：关于电路活动时间依赖性VORMAGNETISIERUNGSSTROMERZEUGUNG容量SWITCHED
公开(公告)号：EP2353220B1
公开(公告)日：2015-12-23
申请号：EP09792677.8
申请日：2009-09-17
申请人： QUALCOMM Incorporated
发明人： LEE, Chun C.
IPC分类号： H03F1/02 , H03F3/00 , H03F3/45
CPC分类号： H03F3/45183 , H03F1/0261 , H03F3/005 , H03F2203/45166 , H03F2203/45244 , H03F2203/45321 , H03F2203/45461 , H03F2203/45466 , H03F2203/45471 , H03F2203/45512 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616 , H03F2203/45674

4. 发明公开

EP1168603A1 Switched-capacitor, fully-differential operational amplifier with high switching frequency 审中-公开
标题翻译：与开关电容器和高Schaltgefrequenz全差分运算放大器
公开(公告)号：EP1168603A1
公开(公告)日：2002-01-02
申请号：EP00830449.5
申请日：2000-06-26
申请人： STMicroelectronics S.r.l.
发明人： Baschirotto, Andrea , Cusinato, Paolo
IPC分类号： H03F3/45
CPC分类号： H03F3/45708 , H03F3/45183 , H03F2203/45461 , H03F2203/45511 , H03F2203/45594 , H03F2203/45666
摘要： Fully-differential, switched-capacitor circuit having a first and second input terminal (5a, 5b), and including: an operational amplifier (2, 41) having a first and a second differential input (4a, 4b), a first and a second output terminal (8a, 8b) and a bias control terminal (17); a feedback network (9a, 9b), connected between the differential outputs (8a, 8b) and the input terminals (5a, 5b), and having intermediate nodes connected to the differential inputs (4a, 4b) of the operational amplifier (2, 41); and a control circuit (3), including a detection network (19) and an error amplifier (20, 21). The error amplifier (20) has a first input receiving a desired common-mode voltage (V XID ), and an output connected to the bias control terminal (17) and supplying a control voltage (V XC ). The detection network (19) has a first and a second input connected directly, respectively, to the second input terminal (4a, 4b) of the operational amplifier (2, 41), and an output connected to a second input of the error amplifier (20), and supplying a common-mode drive voltage (V XCM ).
摘要翻译：全差分开关电容电路，其具有第一和第二输入端子（5A，5B），并且包括：一个运算放大器（2，41），具有第一和第二差分输入端（4A，4B），一个第一和一个第二输出端子（8A，8B）和一个偏置控制端（17）; 反馈网络（9A，9B），连接在所述差分输出之间（8A，8B）和所述输入端子（5A，5B），并具有连接到所述差分输入中间节点（4A，4B）的运算放大器（2， 41）; 和控制电路（3），包括检测网络（19）和误差放大器（20，21）。误差放大器（20）具有连接到偏置控制端子（17）的第一输入端接收期望的共模电压（VXID），并输出和提供控制电压（VXC）。检测网络（19）具有第一和分别直接连接，一个第二输入端，所述第二输入端（4A，4B）的运算放大器（2，41），以及连接到所述误差放大器的第二输入输出（20）和供给的共模电压驱动器（VXCM）。

5. 发明授权

EP2557687B1 Low-noise amplifier, receiver, method and computer program 有权
公开(公告)号：EP2557687B1
公开(公告)日：2018-06-13
申请号：EP11177281.0
申请日：2011-08-11
申请人： Telefonaktiebolaget LM Ericsson (publ)
发明人： Sjöland, Henrik
IPC分类号： H03F3/45 , H03F1/56 , H03F1/30 , H03F3/193
CPC分类号： H03F1/56 , H03F1/303 , H03F3/19 , H03F3/193 , H03F3/45071 , H03F3/45098 , H03F3/45183 , H03F3/45197 , H03F2200/222 , H03F2200/294 , H03F2200/447 , H03F2200/451 , H03F2200/468 , H03F2203/45458 , H03F2203/45461 , H03F2203/45464 , H03F2203/45488 , H03F2203/45544 , H03F2203/45554 , H03F2203/45562 , H03F2203/45622 , H03F2203/45638 , H03F2203/45702
摘要： A differential cross-coupled common-source or common-emitter low-noise amplifier having capacitive degeneration is disclosed. Further, a radio receiver comprising such a low-noise amplifer is disclosed. Further, a method of controlling switched capacitive networks of an amplifier is disclosed. The method comprises controlling capacitances of the switched degeneration capacitor networks and/or the switched cross-coupling capacitor networks. Further, a computer program for implementing the method is disclosed.

6. 发明公开

EP1845618A4 CLOCK BUFFER 审中-公开
标题翻译： TAKTPUFFER
公开(公告)号：EP1845618A4
公开(公告)日：2013-04-24
申请号：EP05709760
申请日：2005-02-04
申请人： FUJITSU LTD
发明人： KIBUNE MASAYA
IPC分类号： H03K5/01 , G06F1/04 , H03F3/45 , H03H11/04
CPC分类号： H03F3/45183 , H03F3/45197 , H03F3/45475 , H03F2203/45138 , H03F2203/45458 , H03F2203/45461 , H03F2203/45466 , H03F2203/45506 , H03F2203/45652 , H03H11/34
摘要： To reduce noise at frequencies below the fundamental frequency of a clock and to suppress a DC component included in the clock. A clock buffer (1) has a band-pass frequency characteristic, in which a pass band of the buffer includes a fundamental frequency (f0) of a clock (CLK1) and a gain for attenuating signals, that is, a gain of less than 0 dB is provided at frequencies below the pass band. Therefore, the clock buffer can output a clock (CLK2) reduced in noise at frequencies below the fundamental frequency (f0) of the clock (CLK1). Further, the clock buffer can output the clock (CLK2) suppressed in a DC component (offset voltage) included in the clock (CLK1).

7. 发明公开

EP2557687A1 Low-noise amplifier, receiver, method and computer program 有权
标题翻译：劳斯瓦尔·维尔斯塔克（Empus），维尔芬（Verfahren）和计算机程序（Computer Program）
公开(公告)号：EP2557687A1
公开(公告)日：2013-02-13
申请号：EP11177281.0
申请日：2011-08-11
申请人： Telefonaktiebolaget LM Ericsson (publ)
发明人： Sjöland, Henrik
IPC分类号： H03F3/45 , H03F1/56 , H03F1/30 , H03F3/193
CPC分类号： H03F1/56 , H03F1/303 , H03F3/19 , H03F3/193 , H03F3/45071 , H03F3/45098 , H03F3/45183 , H03F3/45197 , H03F2200/222 , H03F2200/294 , H03F2200/447 , H03F2200/451 , H03F2200/468 , H03F2203/45458 , H03F2203/45461 , H03F2203/45464 , H03F2203/45488 , H03F2203/45544 , H03F2203/45554 , H03F2203/45562 , H03F2203/45622 , H03F2203/45638 , H03F2203/45702
摘要： A differential cross-coupled common-source or common-emitter low-noise amplifier having capacitive degeneration is disclosed. Further, a radio receiver comprising such a low-noise amplifer is disclosed. Further, a method of controlling switched capacitive networks of an amplifier is disclosed. The method comprises controlling capacitances of the switched degeneration capacitor networks and/or the switched cross-coupling capacitor networks. Further, a computer program for implementing the method is disclosed.
摘要翻译：公开了具有电容退化的差分交叉耦合共源或共发射极低噪声放大器。此外，公开了一种包括这种低噪声放大器的无线电接收机。此外，公开了一种控制放大器的开关电容网络的方法。该方法包括控制开关退化电容器网络和/或开关交叉耦合电容器网络的电容。此外，公开了一种用于实现该方法的计算机程序。

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