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1. 发明授权

EP0503183B1 Instrument with continuity capture feature 失效
标题翻译：仪器与检测流路的
公开(公告)号：EP0503183B1
公开(公告)日：1996-11-20
申请号：EP91304669.4
申请日：1991-05-23
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Meldrum, Glen A. , McRobert, Alan W. , Greenberg, Robert M.
IPC分类号： G01R15/12 , G01R31/02
CPC分类号： G01R31/026

2. 发明授权

EP0503184B1 Electronic instrument with EMI/ESD shielding system 失效
标题翻译：带屏蔽的电子仪器。
公开(公告)号：EP0503184B1
公开(公告)日：1995-04-19
申请号：EP91304972.2
申请日：1991-05-31
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Thompson, Bradley H. , Aikins, Brian S. , Trana, Roger M.
IPC分类号： H05K9/00
CPC分类号： H05K9/002

3. 发明公开

EP0569128A2 Extended high-speed testing of microprocessor-based devices 失效
标题翻译： ErweiterteHochgeschwindigkeitprüfungeines mikroprozessorbetriebenenGeräts。
公开(公告)号：EP0569128A2
公开(公告)日：1993-11-10
申请号：EP93302638.7
申请日：1993-04-02
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Moore, Matthew P.
IPC分类号： G06F11/26
CPC分类号： G06F11/261
摘要： It is both desirable and practical to provide direct access by a microprocessor-based unit under test to control registers and/or status latches of emulated peripheral circuitry, ports or devices which are connected to the unit under test by a memory emulation test apparatus. Such access is provided in a simple manner and with a minimum of hardware added to the ROM emulator of the memory emulation test apparatus. A bus controller is provided to control read and write operations from emulated control registers and status latch to the memory emulator and/or the input/output module of the memory emulation tester apparatus over a data bus. The bus controller is selectively operated to accumulate addresses and to cause read and write operations in response to read operations requested for predetermined areas of an address space by the microprocessor of the unit under test. By providing direct access to peripheral devices and ports, the visibility of the periphery of the unit under test is improved and processing overhead of the memory emulation test apparatus is reduced, resulting in more extensive testing which can be carried out at the full speed of the microprocessor of the unit under test. Performing the test routine through the microprocessor of the unit under test thus greatly increases speed of execution of the test procedure.
摘要翻译：提供由基于微处理器的被测单元的直接访问是期望和实际的，以控制由存储器仿真测试装置连接到被测单元的仿真外围电路，端口或设备的寄存器和/或状态锁存器。这种访问以简单的方式提供，并且将最少的硬件添加到存储器仿真测试装置的ROM模拟器中。提供总线控制器以通过数据总线控制从仿真控制寄存器和状态锁存器到存储器仿真器和/或存储器仿真测试仪器的输入/输出模块的读和写操作。选择性地操作总线控制器以累积地址并且响应于被测单元的微处理器对地址空间的预定区域请求的读取操作而引起读取和写入操作。通过提供对外围设备和端口的直接访问，改善了被测单元周边的可视性，并且减少了存储器仿真测试设备的处理开销，从而进行了更广泛的测试，可以以全速被测单元的微处理器。通过被测单元的微处理器执行测试程序，大大提高了测试程序的执行速度。

4. 发明公开

EP0497478A3 Low impedance, high voltage protection circuit 失效
标题翻译：低阻抗，高压保护电路
公开(公告)号：EP0497478A3
公开(公告)日：1993-03-31
申请号：EP92300420.4
申请日：1992-01-17
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Carson, Daniel B.
IPC分类号： H02H9/04 , G01R1/36
CPC分类号： G01R1/36 , H01L2924/0002 , H02H9/04 , H01L2924/00
摘要： A low impedance ovevoltage protection circuit includes a first MOSFET having a drain connected to an input signal and a source connected to a drain of a second MOSFET, the source of the second MOSFET being coupled to the output. The gates of the first and second MOSFETs are connected to voltage supplies which float relative to the input signal values so as to maintain the gates of the respective MOSFETs biased to a conducting state. The maximum and minimum values to which the floating voltage supplies will float are defined by clamping diodes and clamp voltage sources. When the input signal value exceeds a desired positive maximum value, the first MOSFET is no longer biased to an on state whereby the MOSFET turns off, shunting the input signal through a high impedance for limiting input current and removing the input signal from the output. Negative going peak values are removed in a like manner by the second MOSFET. Bipolar transistors are coupled to each MOSFET to allow quick turn off in the event of rapid rise time transient input values.

5. 发明公开

EP0504515A2 Memory emulation test system in which undesirable microprocessor reset is precluded 失效
标题翻译： Speicheremulationprüfssystemmit VermeidungunerwünschterMikroprozessorsrücksetzung。
公开(公告)号：EP0504515A2
公开(公告)日：1992-09-23
申请号：EP91306398.8
申请日：1991-07-15
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Moore, Matthew P.
IPC分类号： G06F11/26
CPC分类号： G06F11/261
摘要： An emulative test system is provided in which a UUT microprocessor may execute user-written code in an emulation memory, or pre-existing code in a UUT boot ROM, at its own clock rate, and then switch to execution of tester-supplied code from the test system's emulation memory without resetting the UUT microprocessor or disturbing UUT devices that have been initialized.
摘要翻译：提供了一种仿真测试系统，其中UUT微处理器可以以其自身的时钟速率在仿真存储器或UUT引导ROM中的预先存在的代码中执行用户编写的代码，然后切换到执行测试仪提供的代码测试系统的仿真存储器，而不会重置UUT微处理器或打扰初始化的UUT设备。

6. 发明公开

EP0503185A1 Multimeter having min/max time stamp 失效
标题翻译：万用表最小和最大sowie der jeweilszugehörigenZeit。
公开(公告)号：EP0503185A1
公开(公告)日：1992-09-16
申请号：EP91305480.5
申请日：1991-06-18
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Meldrum, Glen A. , McRobert, Alan W. , Greenberg, Robert M.
IPC分类号： G01D1/12
CPC分类号： G01D1/12
摘要： A min/max time stamp for a multimeter provides display of minimum and maximum measured values recorded since enabling a min/max function. The minimum and maximum values, as well as a present value, may be displayed, together with the relative or absolute time at which the measured minimum or maximum occurred. An alert signal is generated to indicate a new maximum or a new minimum measurement.
摘要翻译：万用表的最小/最大时间戳显示了启用最小/最大功能后记录的最小和最大测量值。可以显示最小值和最大值以及当前值，连同发生测量的最小值或最大值的相对或绝对时间。生成警报信号以指示新的最大或新的最小测量。

7. 发明公开

EP0454347A3 Vacuum-actuated test fixture for testing electronic components 失效
标题翻译：用于测试电子元件的真空致动测试仪器
公开(公告)号：EP0454347A3
公开(公告)日：1992-05-20
申请号：EP91303380.9
申请日：1991-04-16
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Letourneau, Andre P.
IPC分类号： G01R1/073 , G01R31/28 , G01R1/04
CPC分类号： G01R1/0483
摘要： A miniature vacuum-actuated test fixture for testing individual components or localized areas of circuit boards includes a probe module having an array of probes carried by a piston, and a separable registration module which may be visually aligned over a component or circuitry and attached before the probes are ever in contact with the circuit board. Once the registration module is attached to the circuit board, the registration module is joined with the probe module, and the probe module is evacuated, drawing the piston upward, carrying the probes into contact with the component or circuitry.

8. 发明公开

EP0446534A2 Method of functionally testing cache tag rams in limited-access processor systems 失效
标题翻译： Verfahren zurFunktionsprüfungvon Cache-Etiketten-RAMs inzugangsbeschränktenVerarbeitungsanordnungen。
公开(公告)号：EP0446534A2
公开(公告)日：1991-09-18
申请号：EP90314468.1
申请日：1990-12-31
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Moore, Matthew P.
IPC分类号： G06F12/08
CPC分类号： G11C29/44 , G06F12/00 , G11C29/10
摘要： A method of functionally testing cache tag RAMs in processor systems where the kernel is typically inaccessible is disclosed. A test program first determines whether a fault exists at all within the cache tag RAM. If a fault is determined to exist, the faulty RAM location is exercised by sequentially applying patterns of ones and zeros until the pattern of bits actually present at the faulty tag RAM location is determined. A comparison of this pattern of bits with the expected bit pattern provides information as the precise location of the fault so as to permit replacement of defective chips.
摘要翻译：公开了在内核通常不可访问的处理器系统中功能测试缓存标签RAM的方法。测试程序首先确定高速缓存标签RAM内是否存在故障。如果确定存在故障，则通过依次应用1和0的模式来执行错误的RAM位置，直到确定存在于故障标签RAM位置的位的模式。这种比特模式与预期位模式的比较提供了作为故障的精确位置的信息，以便允许更换有缺陷的芯片。

9. 发明公开

EP0426297A2 Ratiometric measurement circuit with improved noise rejection 失效
标题翻译： Schaltung zur Quotientenmessung mit verbesserterRauschunterdrückung。
公开(公告)号：EP0426297A2
公开(公告)日：1991-05-08
申请号：EP90310551.8
申请日：1990-09-27
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Parle, Jonathan J.
IPC分类号： G01R19/255 , G01R27/14 , G01R19/25
CPC分类号： G01R19/25
摘要： A noise rejection circuit improves the signal-to-noise ratio of a ratiometric measurement circuit. A first operational amplifier produces a scaled-up voltage proportional to a low reference voltage. The scaled-up voltage is applied to a series connected reference resistance, whose value is known, and a resistance whose value is unknown and is to be measured. A parameter voltage formed across the resistance is applied to second operational amplifier acting as a buffer. A buffered parameter voltage is scaled down by a voltage divider. The scaled-down voltage is applied to a ratiometric converter, that produces an output representative of the unknown resistance value. The ratio of a first pair of resistors that determines the gain of the first operational amplifier is the same as the ratio of a second pair of resistors that form the voltage divider, such that the low reference voltage is scaled up and the parameter voltage is scaled down by the same factor. The ratiometric converter operates from a low power supply voltage and consumes low amounts of power. The first and second amplifiers are CMOS operational amplifiers that, despite operating from a relatively high power supply voltage, consume low amounts of power.
摘要翻译：噪声抑制电路提高了比例测量电路的信噪比。第一运算放大器产生与低参考电压成比例的放大电压。放大电压被施加到串联连接的参考电阻，其值是已知的，并且其值是未知的并且将被测量的电阻。电阻上形成的参数电压被施加到充当缓冲器的第二运算放大器。缓冲参数电压由分压器缩小。按比例的电压被施加到比例转换器，其产生代表未知电阻值的输出。确定第一运算放大器的增益的第一对电阻器的比率与形成分压器的第二对电阻器的比率相同，使得低参考电压放大并且参数电压被缩放下降了同样的因素。比例转换器工作在低电源电压并且消耗少量的功率。第一和第二放大器是CMOS运算放大器，尽管从相对高的电源电压进行操作，但是消耗的功率很少。

10. 发明公开

EP0402497A1 Method of and apparatus for diagnosing failures in read only memory systems and the like 失效
标题翻译：在Festwertspeichersystemen und dergleichen的Verfahren und Vorrichtung zur Fehlerdiagnose。
公开(公告)号：EP0402497A1
公开(公告)日：1990-12-19
申请号：EP89110705.4
申请日：1989-06-13
申请人： JOHN FLUKE MFG. CO., INC.
发明人： Guntheroth, Kurt
IPC分类号： G11C29/00
CPC分类号： G11C29/025 , G11C17/14 , G11C29/10 , G11C29/56
摘要： A semiconductor memory such as a read only memory (ROM) is tested and faults are diagnosed and identified by examining data stored therein for patterns that could not exist if the memory is faulty, proving the memory to be functional by counterexample. Diagnosis is carried out using probabilistic algorithms that terminate quickly if the memory is not faulty, with any pathological contents of the memory masked to minimize the likelihood of misdiagnosis. Faults diagnosed in accordance with the invention include stuck or tied data or address lines.
摘要翻译：测试诸如只读存储器（ROM）的半导体存储器，并且通过检查存储在其中的数据来诊断和识别故障，如果存储器有故障，则证明存储器能够被反映为功能。使用概率算法进行诊断，如果存储器没有故障，则可以迅速终止，掩蔽内存的任何病理内容以最小化误诊的可能性。根据本发明诊断的故障包括卡住或绑定的数据或地址线。

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