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    • 9. 发明公开
    • DTC-BASED PLL AND METHOD FOR OPERATING THE DTC-BASED PLL
    • 基于DTC的PLL和用于操作基于DTC的PLL的方法
    • EP3249817A1
    • 2017-11-29
    • EP17172898.3
    • 2017-05-24
    • IMEC vzwStichting IMEC NederlandVrije Universiteit Brussel
    • MARKULIC, NereoLIU, Yao-HongCRANINCKX, Jan
    • H03L7/197H03L7/081H03L7/099
    • H03L7/085H03K5/159H03K2005/00013H03L7/081H03L7/0991H03L7/197H03L7/1976H03L2207/50
    • The disclosure provides a phase locked loop, PLL, for phase locking an output signal to a reference signal. The PLL comprises a reference path providing the reference signal to a first input of a phase detector, a feedback loop providing the output signal of the PLL as a feedback signal to a second input of the phase detector, a controllable oscillator generating the output signal based on at least a phase difference between reference and feedback signal, a digital-to-time converter, DTC, delaying a signal that is provided at one of the first and second input, a delay calculation path for calculating a DTC delay value. The PLL further comprises a randomization unit for generating and adding a stream of pseudo-random offsets, i.e. pseudo-random numbers, to the delay value. The offset is such that the target output of the phase detector remains substantially unchanged.
    • 本公开提供了一种锁相环PLL,用于将输出信号锁相到参考信号。 PLL包括将参考信号提供给相位检测器的第一输入端的参考路径,将PLL的输出信号作为反馈信号提供给相位检测器的第二输入端的反馈回路,基于相位检测器产生输出信号的可控制振荡器 至少在参考和反馈信号之间的相位差上,数字 - 时间转换器DTC延迟在第一和第二输入之一提供的信号,延迟计算路径用于计算DTC延迟值。 该PLL还包括一个随机化单元,用于产生一个伪随机偏移流,即伪随机数,并将其添加到该延迟值。 偏移量使得相位检测器的目标输出保持基本不变。