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1. 发明授权

EP1411639B1 A Sigma-Delta (SD) Analog-To-Digital Converter (ADC) structure incorporating a direct sampling mixer 有权
标题翻译： Σ-Δ模拟到数字转换器装置与一直接采样混频
公开(公告)号：EP1411639B1
公开(公告)日：2008-03-26
申请号：EP03103860.7
申请日：2003-10-17
申请人： Texas Instruments Incorporated
发明人： Staszewski, Robert B. , Chen, Feng , Muhammad, Khurram , Leipold, Dirk
IPC分类号： H03M3/02
CPC分类号： H03M3/47 , H03M3/496 , H04B1/1036

2. 发明公开

EP1411639A2 A Sigma-Delta (SD) Analog-To-Digital Converter (ADC) structure incorporating a direct sampling mixer 有权
标题翻译： Sigma-Delta Analog-Digital-Wandleranordnung mit einem direkt abtastenden Mischer
公开(公告)号：EP1411639A2
公开(公告)日：2004-04-21
申请号：EP03103860.7
申请日：2003-10-17
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Staszewski, Robert B. , Chen, Feng , Muhammad, Khurram , Leipold, Dirk
IPC分类号： H03M3/02
CPC分类号： H03M3/47 , H03M3/496 , H04B1/1036
摘要： A sigma-delta analog-to-digital converter offers advantages such as noise shaping and high frequency operation. However, a sampling circuit needed to provide a highly oversampled discrete-time sample stream with low noise characteristics is difficult to design and implement. The present invention provides a sigma-delta mixer 300 with such a sampling circuit 310. The present invention discloses a sampling circuit using switched capacitors 307, 308, and 309 with low noise characteristics and at the same time is capable of providing a highly oversampled discrete-time sample stream.
摘要翻译： Σ-Δ模数转换器提供了诸如噪声整形和高频操作等优点。然而，需要提供具有低噪声特性的高度过采样的离散时间采样流所需的采样电路难以设计和实现。本发明提供了具有这种采样电路310的Σ-Δ混合器300.本发明公开了一种使用具有低噪声特性的开关电容器307,308和309的采样电路，并且同时能够提供高度过采样的离散时间采样流。

3. 发明授权

EP1109316B1 System and method for offset error compensation in comparators 有权
标题翻译：系统和方法，用于在比较器的偏移电压误差的补偿
公开(公告)号：EP1109316B1
公开(公告)日：2012-05-09
申请号：EP00310889.1
申请日：2000-12-07
申请人： Texas Instruments Incorporated
发明人： Chen, Feng
IPC分类号： H03K5/24
CPC分类号： H03K5/24 , H03F3/45968 , H03F2200/331

4. 发明公开

EP1109316A3 System and method for offset error compensation in comparators 有权
标题翻译： Komparatoren系统与Verfahren zur Kompensation des Offsetspannungsfehlers
公开(公告)号：EP1109316A3
公开(公告)日：2006-07-12
申请号：EP00310889.1
申请日：2000-12-07
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Chen, Feng
IPC分类号： H03K5/24
CPC分类号： H03K5/24 , H03F3/45968 , H03F2200/331
摘要： An offset error compensation system is provided that includes a comparator (42) having an offset error (44), a positive receptor (56), a negative receptor (58), a positive output (60), and a negative output (62). A sequence generator (14) generates control signals (22) representing normal cycles and swap cycles. A first cross connect (46) is coupled to the positive receptor (56), the negative receptor (58), a'positive input signal (52), and a negative input signal (54). The first cross connect (46) couples the positive input signal (52) to the positive receptor (56) and the negative input signal (54) to the negative receptor (58) in response to a normal cycle. The first cross connect (46) further couples the positive input signal (52) to the negative receptor (58) and the negative input signal (54) to the positive receptor (56) in response to a swap cycle. A second cross connect (48) is coupled to the positive receptor (56), the negative receptor (58), the positive output (60), and the negative output (62). The second cross connect (48) couples the positive receptor (56) to the positive output (60) and the negative receptor (58) to the negative output (62) in response to the normal cycle. The second cross connect (48) further couples the positive receptor (56) to the negative output (62) and the negative receptor (58) to the positive output (60) in response the swap cycle.
摘要翻译：提供了一种偏移误差补偿系统，其包括具有偏移误差（44），正接收器（56），负接收器（58），正输出（60）和负输出（62）的比较器（42）。序列发生器（14）产生表示正常周期和交换周期的控制信号（22）。第一交叉连接（46）耦合到正接收器（56），负接收器（58），正输入信号（52）和负输入信号（54）。第一交叉连接器（46）响应于正常周期将正输入信号（52）耦合到正接收器（56）和负输入信号（54）耦合到负接收器（58）。响应于交换周期，第一交叉连接（46）还将正输入信号（52）与负接收器（58）和负输入信号（54）耦合到正接收器（56）。第二交叉连接（48）耦合到正接收器（56），负接收器（58），正输出（60）和负输出（62）。响应于正常周期，第二交叉连接器（48）将正接收器（56）与正输出（60）和负接收器（58）耦合到负输出端（62）。响应于交换周期，第二交叉连接器（48）还将正接收器（56）与负输出端（62）和负接收器（58）耦合到正输出端（60）。

5. 发明公开

EP1411639A3 A Sigma-Delta (SD) Analog-To-Digital Converter (ADC) structure incorporating a direct sampling mixer 有权
标题翻译： Σ-Δ模拟到数字转换器装置与一直接采样混频
公开(公告)号：EP1411639A3
公开(公告)日：2005-01-19
申请号：EP03103860.7
申请日：2003-10-17
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Staszewski, Robert B. , Chen, Feng , Muhammad, Khurram , Leipold, Dirk
IPC分类号： H03M3/02
CPC分类号： H03M3/47 , H03M3/496 , H04B1/1036
摘要： A sigma-delta analog-to-digital converter offers advantages such as noise shaping and high frequency operation. However, a sampling circuit needed to provide a highly oversampled discrete-time sample stream with low noise characteristics is difficult to design and implement. The present invention provides a sigma-delta mixer 300 with such a sampling circuit 310. The present invention discloses a sampling circuit using switched capacitors 307, 308, and 309 with low noise characteristics and at the same time is capable of providing a highly oversampled discrete-time sample stream.

6. 发明公开

EP1109316A2 System and method for offset error compensation in comparators 有权
标题翻译：系统和方法，用于在比较器的偏移电压误差的补偿
公开(公告)号：EP1109316A2
公开(公告)日：2001-06-20
申请号：EP00310889.1
申请日：2000-12-07
申请人： Texas Instruments Incorporated
发明人： Chen, Feng
IPC分类号： H03K5/24
CPC分类号： H03K5/24 , H03F3/45968 , H03F2200/331
摘要： An offset error compensation system is provided that includes a comparator (42) having an offset error (44), a positive receptor (56), a negative receptor (58), a positive output (60), and a negative output (62). A sequence generator (14) generates control signals (22) representing normal cycles and swap cycles. A first cross connect (46) is coupled to the positive receptor (56), the negative receptor (58), a'positive input signal (52), and a negative input signal (54). The first cross connect (46) couples the positive input signal (52) to the positive receptor (56) and the negative input signal (54) to the negative receptor (58) in response to a normal cycle. The first cross connect (46) further couples the positive input signal (52) to the negative receptor (58) and the negative input signal (54) to the positive receptor (56) in response to a swap cycle. A second cross connect (48) is coupled to the positive receptor (56), the negative receptor (58), the positive output (60), and the negative output (62). The second cross connect (48) couples the positive receptor (56) to the positive output (60) and the negative receptor (58) to the negative output (62) in response to the normal cycle. The second cross connect (48) further couples the positive receptor (56) to the negative output (62) and the negative receptor (58) to the positive output (60) in response the swap cycle.

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