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1. 发明公开

EP2053813A2 Data transmission 审中-公开
标题翻译：数据传输
公开(公告)号：EP2053813A2
公开(公告)日：2009-04-29
申请号：EP08253250.8
申请日：2008-10-07
申请人： Tektronix Inc.
发明人： Hazzard, Shane A. , Tran, Que Thuy , Klingman, Kayla R. , Kelly, David L. , Smith, Patrick A. , Knierim, Daniel G.
IPC分类号： H04L25/45
CPC分类号： H03M9/00 , H04J3/076 , H04L25/14 , H04L25/4908
摘要： Serial data is input to a transmitter, where it is demultiplexed into a plurality of multi-bit lanes, e.g. n bits for each of N lanes. The N lanes are then encoded into characters, the encoded N lanes having m bits per lane where m>n. Bit stuffing is used to adjust the data rate and/or to insert qualifiers. The stuffed, encoded N lanes are then multiplexed into N serial lanes, which are output from the transmitter section for input to a receiver section.
In the receiver section the N lanes are deserialized, decoded and input to a word recognizer to generate a trigger event signal.
摘要翻译：串行数据被输入到发射机，在那里它被解复用成多个多比特通道，例如，每个N通道有n位。然后将N个车道编码为字符，编码的N个车道每m个位具有m位，其中m> n。位填充用于调整数据速率和/或插入限定符。然后将填充的编码的N个通道多路复用到N个串行通道中，这些通道从发送器部分输出以输入到接收器部分。在接收器部分，N个通道被解串行，解码并输入到字识别器以生成触发事件信号。

2. 发明授权

EP2285035B1 Test and measurement instrument with bit-error detection 有权转让
公开(公告)号：EP2285035B1
公开(公告)日：2019-10-09
申请号：EP10251405.6
申请日：2010-08-05
申请人： Tektronix, Inc.
发明人： Tran, Que Thuy
IPC分类号： H04L1/24 , G01R31/317 , H04L1/00

3. 发明公开

EP2285035A3 Test and measurement instrument with bit-error detection 有权转让
标题翻译：与误码测试和测量仪器
公开(公告)号：EP2285035A3
公开(公告)日：2013-11-13
申请号：EP10251405.6
申请日：2010-08-05
申请人： TEKTRONIX, INC.
发明人： Tran, Que Thuy
IPC分类号： H04L1/24 , G01R13/02 , H04L1/00
CPC分类号： H04L1/242 , G01R31/3171 , H04L1/0061
摘要： A test and measurement instrument including an input configured to receive a signal and output digitized data; a memory configured to store reference digitized data including a reference sequence; a pattern detector configured to detect the reference sequence in the digitized data and generate a synchronization signal in response; a memory controller configured to cause the memory to output the reference digitized data in response to the synchronization signal; and a comparator configured to compare the reference digitized data output from the memory to the digitized data.

4. 发明公开

EP2053813A3 Data transmission 审中-公开
标题翻译：数据传输
公开(公告)号：EP2053813A3
公开(公告)日：2010-12-08
申请号：EP08253250.8
申请日：2008-10-07
申请人： Tektronix Inc.
发明人： Hazzard, Shane A. , Tran, Que Thuy , Klingman, Kayla R. , Kelly, David L. , Smith, Patrick A. , Knierim, Daniel G.
IPC分类号： H04L25/45 , H04L25/05 , H04L25/14 , H04L25/49
CPC分类号： H03M9/00 , H04J3/076 , H04L25/14 , H04L25/4908
摘要： Serial data is input to a transmitter, where it is demultiplexed into a plurality of multi-bit lanes, e.g. n bits for each of N lanes. The N lanes are then encoded into characters, the encoded N lanes having m bits per lane where m>n. Bit stuffing is used to adjust the data rate and/or to insert qualifiers. The stuffed, encoded N lanes are then multiplexed into N serial lanes, which are output from the transmitter section for input to a receiver section.
In the receiver section the N lanes are deserialized, decoded and input to a word recognizer to generate a trigger event signal.

5. 发明授权

EP2341355B1 Blanking primitives masking circuit 有权
标题翻译：消隐原语掩蔽电路
公开(公告)号：EP2341355B1
公开(公告)日：2013-06-05
申请号：EP10252129.1
申请日：2010-12-16
申请人： Tektronix, Inc.
发明人： Tran, Que Thuy
IPC分类号： G01R31/317 , H04L12/00 , H04L12/40
CPC分类号： G01R31/31716 , H04L12/40013

6. 发明公开

EP2285035A2 Test and measurement instrument with bit-error detection 有权转让
标题翻译： Prüf-und Messinstrument mit Bitfehlerdetektion
公开(公告)号：EP2285035A2
公开(公告)日：2011-02-16
申请号：EP10251405.6
申请日：2010-08-05
申请人： TEKTRONIX, INC.
发明人： Tran, Que Thuy
IPC分类号： H04L1/24
CPC分类号： H04L1/242 , G01R31/3171 , H04L1/0061
摘要： A test and measurement instrument including an input configured to receive a signal and output digitized data; a memory configured to store reference digitized data including a reference sequence; a pattern detector configured to detect the reference sequence in the digitized data and generate a synchronization signal in response; a memory controller configured to cause the memory to output the reference digitized data in response to the synchronization signal; and a comparator configured to compare the reference digitized data output from the memory to the digitized data.
摘要翻译：一种测试和测量仪器，包括被配置为接收信号并输出数字化数据的输入; 存储器，被配置为存储包括参考序列的参考数字化数据; 模式检测器，被配置为检测所述数字化数据中的参考序列，并响应地产生同步信号; 存储器控制器，被配置为响应于所述同步信号使所述存储器输出所述参考数字化数据; 以及比较器，被配置为将从存储器输出的参考数字化数据与数字化数据进行比较。

7. 发明授权

EP2700961B1 Test and measurement instrument with auto-sync for bit-error detection 有权转让
标题翻译：与自动同步位错误检测测试与测量仪器
公开(公告)号：EP2700961B1
公开(公告)日：2015-07-22
申请号：EP13181245.5
申请日：2013-08-21
申请人： Tektronix, Inc.
发明人： Tran, Que Thuy
IPC分类号： G01R31/319 , G01R31/317
CPC分类号： G01R31/31917 , G01R31/3171

8. 发明公开

EP2700961A1 Test and measurement instrument with auto-sync for bit-error detection 有权转让
标题翻译： Prüf-und Messinstrument mit自动同步zur Bitfehlerdetektion
公开(公告)号：EP2700961A1
公开(公告)日：2014-02-26
申请号：EP13181245.5
申请日：2013-08-21
申请人： Tektronix, Inc.
发明人： Tran, Que Thuy
IPC分类号： G01R31/319 , G01R31/317
CPC分类号： G01R31/31917 , G01R31/3171
摘要： Embodiments of the invention include methods, apparatuses, and systems for automatically identifying a synchronization sub-pattern associated with a test pattern. A test and measurement instrument is triggered in response to a first instance of a trigger pattern in a data stream. A trigger-to-trigger counter begins counting at the time of the first trigger event. The test and measurement instrument is again triggered in response to a second instance of the trigger pattern in the data stream. The count is ended at this time. The count is then compared to a predefined length of the test pattern, and if equal, it is automatically determined that the trigger pattern is the unique synchronization sub-pattern associated with the test pattern.
摘要翻译：本发明的实施例包括用于自动识别与测试图案相关联的同步子模式的方法，装置和系统。响应于数据流中的触发模式的第一实例来触发测试和测量仪器。触发触发计数器在第一次触发事件发生时开始计数。响应于数据流中的触发模式的第二实例，再次触发测试和测量仪器。此时计数结束。然后将计数与测试模式的预定义长度进行比较，如果相等，则自动确定触发模式是与测试模式相关联的唯一同步子模式。

9. 发明公开

EP2341355A1 Blanking primitives masking circuit 有权
标题翻译：消隐原语掩蔽电路
公开(公告)号：EP2341355A1
公开(公告)日：2011-07-06
申请号：EP10252129.1
申请日：2010-12-16
申请人： Tektronix, Inc.
发明人： Tran, Que Thuy
IPC分类号： G01R31/317 , H04L12/00
CPC分类号： G01R31/31716 , H04L12/40013
摘要： A blanking primitive masking circuit has a detection and handling circuit that receives data containing blanking primitives. The detection and handling circuit generates a dynamic blanking signal when blanking primitives are detected. The received data is delayed and provided to a pattern detector that generates a synchronization signal provided to a memory and a phase sync signal provided to the detection and handling circuit and to a comparator. The comparator receives reference data from the memory, the delayed data, and the dynamic blanking signal. The comparator compares the reference data with the delayed data and generates bit error outputs from mismatched reference data bits and delayed data bits when the dynamic blanking signal from the detection and handling circuit is absent and suppressing the generation bit error outputs when the blanking primitive are in the delay data and the dynamic blanking signal is present.
摘要翻译：消隐原始屏蔽电路具有接收包含消隐基元的数据的检测和处理电路。检测和处理电路在检测到消隐基元时产生动态消隐信号。接收的数据被延迟并提供给模式检测器，该模式检测器产生提供给存储器的同步信号和提供给检测和处理电路以及比较器的相位同步信号。比较器从存储器接收参考数据，延迟数据和动态消隐信号。比较器将参考数据与延迟的数据进行比较，并且当来自检测和处理电路的动态消隐信号不存在时，从失配的参考数据比特和延迟的数据比特产生比特误差输出，并且在消隐原语处于输入时抑制产生比特误差输出存在延迟数据和动态消隐信号。

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