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1. 发明公开

EP2583323A2 COMPOSITION OF MEMORY CELL WITH RESISTANCE-SWITCHING LAYERS 有权转让
标题翻译：细胞与电阻开关层：组成
公开(公告)号：EP2583323A2
公开(公告)日：2013-04-24
申请号：EP11729217.7
申请日：2011-06-10
申请人： Sandisk 3D LLC
发明人： KREUPL, Franz , BANDYOPADHYAY, Abhijit , CHEN, Yung-Tin , FU, Chu-Chen , JAYASEKARA, Wipul, Pemsiri , KAI, James , MAKALA, Raghuveer, S. , RABKIN, Peter , SAMACHISA, George , ZHANG, Jingyan
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L27/2409 , G11C11/16 , G11C11/1659 , G11C13/0007 , G11C2213/31 , G11C2213/71 , G11C2213/72 , H01L27/2481 , H01L45/08 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146
摘要： A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has first and second resistance-switching layers on either side of a conductive intermediate layer, and first and second electrodes at either end of the RSME. The first and second resistance-switching layers can both have a bipolar or unipolar switching characteristic. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.

2. 发明授权

EP2583323B1 COMPOSITION OF MEMORY CELL WITH RESISTANCE-SWITCHING LAYERS 有权转让
标题翻译：细胞与电阻开关层：组成
公开(公告)号：EP2583323B1
公开(公告)日：2016-04-20
申请号：EP11729217.7
申请日：2011-06-10
申请人： SanDisk 3D LLC
发明人： KREUPL, Franz , BANDYOPADHYAY, Abhijit , CHEN, Yung-Tin , FU, Chu-Chen , JAYASEKARA, Wipul, Pemsiri , KAI, James , MAKALA, Raghuveer, S. , RABKIN, Peter , SAMACHISA, George , ZHANG, Jingyan
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L27/2409 , G11C11/16 , G11C11/1659 , G11C13/0007 , G11C2213/31 , G11C2213/71 , G11C2213/72 , H01L27/2481 , H01L45/08 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146

3. 发明公开

EP1864094A1 TRANSISTOR LAYOUT CONFIGURATION FOR TIGHT-PITCHED MEMORY ARRAY LINES 审中-公开
标题翻译： TRANSISTORS阵列配置用于密封有序存储器阵列线
公开(公告)号：EP1864094A1
公开(公告)日：2007-12-12
申请号：EP06740254.5
申请日：2006-03-31
申请人： Sandisk 3D LLC
发明人： PETTI, Christopher J. , SCHEUERLEIN, Roy E. , KUMAR, Tanmay , BANDYOPADHYAY, Abhijit
IPC分类号： G01J1/12
CPC分类号： G11C8/14 , G11C5/02 , G11C5/063 , G11C8/08 , H01L27/0207 , H01L27/0688 , H01L27/10894 , H01L27/10897
摘要： A multi-headed word line driver circuit incorporates bent-gate transistors to reduce the pitch otherwise achievable for interfacing to tightly-pitched array lines. In certain exemplary embodiments, a three-dimensional memory array includes multiple memory blocks and array lines traversing horizontally across at least one memory block. Vertical active area stripes are disposed beneath a first memory block, and a respective plurality of bent-gate electrodes intersects each respective active area stripe to define individual source/drain regions. Every other source/drain region is coupled to a bias node for the active area stripe, and remaining source/drain regions are respectively coupled to a respective array line associated with the first memory block, thereby forming a respective first driver transistor for the respective array line.

4. 发明公开

EP2513994A2 CARBON/TUNNELING-BARRIER/CARBON DIODE 审中-公开
标题翻译： KOHLENSTOFF / TUNNELBARRIERE / KOHLENSTOFFDIODE
公开(公告)号：EP2513994A2
公开(公告)日：2012-10-24
申请号：EP10796527.9
申请日：2010-12-08
申请人： Sandisk 3D LLC
发明人： BANDYOPADHYAY, Abhijit , KREUPL, Franz , MIHNEA, Andrei , LI, Xiao
IPC分类号： H01L45/00
CPC分类号： H01L45/00 , H01L27/2418 , H01L27/2463 , H01L29/16 , H01L29/88
摘要： A carbon/tunneling-barrier/carbon diode and method for forming the same are disclosed. The carbon/tunneling-barrier/carbon may be used as a steering element in a memory array. Each memory cell in the memory array may include a reversible resistivity-switching element and a carbon/tunneling- barrier/carbon diode as the steering element. The tunneling-barrier may include a semiconductor or an insulator. Thus, the diode may be a carbon/semiconductor/carbon diode. The semiconductor in the diode may be intrinsic or doped. The semiconductor may be depleted when the diode is under equilibrium conditions. For example, the semiconductor may be lightly doped such that the depletion region extends from one end of the semiconductor region to the other end. The diode may be a carbon/insulator/carbon diode.
摘要翻译：公开了一种碳/隧道势垒/碳二极管及其形成方法。碳/隧道势垒/碳可以用作存储器阵列中的转向元件。存储器阵列中的每个存储单元可以包括可逆电阻率开关元件和作为转向元件的碳/隧道势垒/碳二极管。隧道势垒可以包括半导体或绝缘体。因此，二极管可以是碳/半导体/碳二极管。二极管中的半导体可以是固有的或掺杂的。当二极管处于平衡条件下时，半导体可能耗尽。例如，半导体可以被轻掺杂，使得耗尽区从半导体区的一端延伸到另一端。二极管可以是碳/绝缘体/碳二极管。

5. 发明公开

EP2478561A1 PIN DIODE WITH SIGE LOW CONTACT RESISTANCE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译： PIN二极管低SIGE接触电阻及其制造方法
公开(公告)号：EP2478561A1
公开(公告)日：2012-07-25
申请号：EP10760496.9
申请日：2010-09-07
申请人： Sandisk 3D LLC
发明人： BANDYOPADHYAY, Abhijit , HOU, Kun , MAXWELL, Steven
IPC分类号： H01L29/165 , H01L29/45 , H01L29/868
CPC分类号： H01L29/868 , H01L27/2409 , H01L27/2481 , H01L29/165 , H01L29/452 , H01L29/456 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146
摘要： A semiconductor p-i-n diode and method for forming the same are described herein. In one aspect, a SiGe region is formed between a region doped to have one conductivity (either p+ or n+) and an electrical contact to the p-i-n diode. The SiGe region may serve to lower the contact resistance, which may increase the forward bias current. The doped region extends below the SiGe region such that it is between the SiGe region and an intrinsic region of the diode. The p-i-n diode may be formed from silicon. The doped region below the SiGe region may serve to keep the reverse bias current from increasing as result of the added SiGe region. In one embodiment, the SiGe is formed such that the forward bias current of an up-pointing p-i-n diode in a memory array substantially matches the forward bias current of a down-pointing p-i-n diode which may achieve better switching results when these diodes are used with the R/W material in a 3D memory array.

6. 发明公开

EP1889294A1 ONE-TIME PROGRAMMABLE CROSSPOINT MEMORY WITH A DIODE AS AN ANTIFUSE 审中-公开
标题翻译：用二极管作为抗熔一次连接可编程交叉点存储器
公开(公告)号：EP1889294A1
公开(公告)日：2008-02-20
申请号：EP06760714.3
申请日：2006-06-06
申请人： Sandisk 3D LLC
发明人： HERNER, S., Brad , BANDYOPADHYAY, Abhijit
IPC分类号： H01L27/102 , G11C17/16
CPC分类号： G11C11/36 , G11C5/02 , G11C11/39 , G11C17/06 , G11C17/16 , H01L27/1021
摘要： A nonvolatile memory cell is described, the memory cell comprising a semiconductor diode (30). The semiconductor material making up the diode is formed with significant defect density between a bottom conductor (6) and a top conductor (22), and allows very low current flow at a typical read voltage. Application of a programming voltage permanently changes the nature of the semiconductor material, resulting in an improved diode. The programmed diode allows much higher current flow, in some embodiments one, two or three orders of magnitude higher, at the same read voltage. The difference in current allows a programmed memory cell to be distinguished from an unprogrammed memory cell. Fabrication techniques to generate an advantageous unprogrammed defect density are described. The memory cell of the present invention can be formed in a monolithic three dimensional memory array, having multiple stacked memory levels formed above a single substrate.

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