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1. 发明授权

EP2956881B1 HARDWARE ENFORCED CONTENT PROTECTION FOR GRAPHICS PROCESSING UNITS 有权
标题翻译：硬件实施方式INHALTSSCHUTZFÜRGRAFIKVERARBEITUNGSEINHEITEN
公开(公告)号：EP2956881B1
公开(公告)日：2017-03-08
申请号：EP13713702.2
申请日：2013-03-19
申请人： Qualcomm Incorporated
发明人： SHARP, Colin, Christopher , KOTTILINGAL, Sudeep, Ravi , FRISINGER, Thomas, Edwin , GRUBER, Andrew, E.
IPC分类号： G06F21/10 , G06F21/74
CPC分类号： G06F21/53 , G06F21/10 , G06F21/50 , G06F21/74 , G06F2221/0746

2. 发明公开

EP2956881A1 HARDWARE ENFORCED CONTENT PROTECTION FOR GRAPHICS PROCESSING UNITS 有权
标题翻译：硬件实现保护内容的图形处理单元
公开(公告)号：EP2956881A1
公开(公告)日：2015-12-23
申请号：EP13713702.2
申请日：2013-03-19
申请人： Qualcomm Incorporated
发明人： SHARP, Colin, Christopher , KOTTILINGAL, Sudeep, Ravi , FRISINGER, Thomas, Edwin , GRUBER, Andrew, E.
IPC分类号： G06F21/10 , G06F21/74
CPC分类号： G06F21/53 , G06F21/10 , G06F21/50 , G06F21/74 , G06F2221/0746
摘要： This disclosure proposes techniques for graphics processing. In one example, a graphics processing unit (GPU) is configured to access a first memory unit according to one of an unsecure mode and a secure mode. The GPU comprises a memory access controller configured to allow the GPU to read data from only an unsecure portion of the first memory unit when the GPU is in the unsecure mode, and configured to allow the GPU to write data only to a secure portion of the first memory unit when the GPU is in the secure mode.

3. 发明公开

EP2834792A2 PATCHED SHADING IN GRAPHICS PROCESSING 审中-公开
标题翻译：图形处理中的补丁阴影
公开(公告)号：EP2834792A2
公开(公告)日：2015-02-11
申请号：EP13713314.6
申请日：2013-03-15
申请人： Qualcomm Incorporated
发明人： GOEL, Vineet , GRUBER, Andrew, E. , KIM, Donghyun
IPC分类号： G06T15/00
CPC分类号： G06T15/80 , G06T15/00 , G06T15/005
摘要： Aspects of this disclosure generally relate to a process for rendering graphics that includes performing, with a hardware shading unit of a graphics processing unit (GPU) designated for vertex shading, vertex shading operations to shade input vertices so as to output vertex shaded vertices, wherein the hardware unit is configured to receive a single vertex as an input and generate a single vertex as an output. The process also includes performing, with the hardware shading unit of the GPU, a geometry shading operation to generate one or more new vertices based on one or more of the vertex shaded vertices, wherein the geometry shading operation operates on at least one of the one or more vertex shaded vertices to output the one or more new vertices.
摘要翻译：本公开的各方面涉及一种用于渲染图形的过程，该过程包括利用为顶点着色指定的图形处理单元（GPU）的硬件单元执行顶点着色操作以对输入顶点进行着色以输出顶点着色顶点，其中，硬件单元遵循接收单个顶点的接口作为输入，并生成单个顶点作为输出。该过程还包括利用指定用于顶点着色的GPU的硬件单元执行船体着色操作以基于一个或多个顶点着色顶点生成一个或多个控制点，其中一个或多个船体着色操作在一个或多个顶点着色顶点中的至少一个顶点着色顶点输出一个或多个控制点。

4. 发明公开

EP2609574A2 PIXEL RENDERING ON DISPLAY 审中-公开
标题翻译：像素表示在显示
公开(公告)号：EP2609574A2
公开(公告)日：2013-07-03
申请号：EP11760900.8
申请日：2011-08-24
申请人： Qualcomm Incorporated
发明人： GRUBER, Andrew, E.
IPC分类号： G06T11/00 , G09G5/14
CPC分类号： G06T11/00 , G06T15/503 , G09G5/14 , G09G2340/12
摘要： This disclosure describes techniques for rendering pixels on a display. A processing unit may receive pixel values for surface pixels of each surface of a plurality of surface. The processing unit may also receive an order of the plurality of surfaces. Based on at least the location and order of the plurality surfaces, the processing unit may blend pixel values for co-located surface pixels. The processing unit may also accumulate opaqueness values for co-located surface pixels and/or opaqueness values for surfaces with co-located surface pixels.

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