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    • 2. 发明公开
    • PROCESSOR
    • 处理器
    • EP2483839A2
    • 2012-08-08
    • EP10763397.6
    • 2010-09-28
    • QinetiQ Limited
    • ORCHARD, David, ArthurWILSON, Rebecca, AnnePRITCHARD, Jonathan, Alexander, SkoylesCOOPER, Martin, JamesSHEPHERD, Terence, JohnLEWIN, Andrew, CharlesTAPSTER, Paul, RichardBENNETT, Charlotte, Rachel, Helen
    • G06K9/74
    • G06K9/74G06F7/02G06F2207/025
    • Apparatus (100) is provided which is arranged to accept an input data stream. In some embodiments, the apparatus (100) comprises a sampler arranged to sample the input data stream to provide k samples thereof, wherein each of the samples is n bits long and a string selector arranged to select m binary strings n bits long from at least a chosen subset of all random binary strings of a predetermined length. The apparatus (100) may further comprise a logical operator arranged to perform a logical function for each of the k samples with each of the selected binary strings to provide a vector, a memory arranged to store a matrix of the vectors generated from k samples, and an address generator arranged to generate RAM address segments from the matrix. In embodiments, the apparatus (100) may comprise a processor for, for example, pattern matching; feature detection, image recognition.
    • 提供装置(100),其被设置为接受输入数据流。 在一些实施例中,所述设备(100)包括采样器,所述采样器被设置为对所述输入数据流进行采样以提供其k个采样,其中每个采样是n位长,并且串选择器被设置为从至少n位长的串 预定长度的所有随机二进制串的选定子集。 所述设备(100)可进一步包括逻辑运算符,所述逻辑运算符被安排为对于所述k个样本中的每一个执行逻辑函数,其中每个所选择的二进制字符串提供向量,存储器,被布置为存储从k个样本产生的向量的矩阵, 以及地址生成器,被设置为从矩阵生成RAM地址段。 在实施例中,装置(100)可以包括用于例如模式匹配的处理器; 特征检测,图像识别。