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1. 发明公开

EP3343456A1 INFORMATION ESTIMATION APPARATUS AND INFORMATION ESTIMATION METHOD 有权转让
公开(公告)号：EP3343456A1
公开(公告)日：2018-07-04
申请号：EP17203449.8
申请日：2017-11-24
申请人： Denso IT Laboratory, Inc.
发明人： Adachi, Jingo
IPC分类号： G06N3/04 , G06N3/08 , G06N7/00
CPC分类号： G06N3/08 , G06F7/02 , G06F7/50 , G06N3/04 , G06N3/0454 , G06N3/082 , G06N7/005
摘要： A technique for stable and fast computation of a variance representing a confidence interval for an estimation result in an estimation apparatus using a neural network including an integrated layer that combines a dropout layer for dropping out part of input data and an FC layer for computing a weight is provided. When input data having a multivariate distribution is supplied to the integrated layer, a data analysis unit 30 determines, based on a numerical distribution of terms formed by respective products of each vector element of the input data and the weight, a data type of each vector element of output data from the integrated layer. An estimated confidence interval computation unit 20 applies an approximate computation method associated with the data type, to analytically compute a variance of each vector element of the output data from the integrated layer based on the input data to the integrated layer.

2. 发明公开

EP3312960A1 DIGITAL PROTECTION CONTROL DEVICE 审中-公开
标题翻译：数字保护控制装置
公开(公告)号：EP3312960A1
公开(公告)日：2018-04-25
申请号：EP15895685.4
申请日：2015-10-14
申请人： Kabushiki Kaisha Toshiba , Toshiba Energy Systems & Solutions Corporation
发明人： SAKASHITA, Hironori , UEMURA, Haruka , ISHIMATSU, Takeshi
IPC分类号： H02H3/05 , H02H3/02
CPC分类号： G06F11/3051 , G06F1/04 , G06F1/28 , G06F7/02 , G06F7/38 , H02H3/02 , H02H3/05 , Y02E60/725 , Y04S10/20
摘要： An analog-digital converting unit 1 converts the electrical quantity obtained from a power system into a digital amount. A non-volatile memory 23 stores a protective control program 230 that achieves the function of a digital protective control device 100. A processor 21 executes the protective control program 230 to perform arithmetic processing on the digital amount output by the analog-digital converting unit. The protective control program 230 includes a basic program 231 and an added program 232 divided in accordance with the function of the digital protective control device 100. The added program 232 includes valid operation period information 234. The processor 21 executes the added program 232 within the valid operation period.
摘要翻译：模数转换单元1将从电力系统获得的电量转换为数字量。非易失性存储器23存储实现数字保护控制装置100的功能的保护控制程序230.处理器21执行保护控制程序230，以对模数转换单元输出的数字量执行运算处理。保护控制程序230包括基本程序231和根据数字保护控制装置100的功能划分的添加程序232.添加程序232包括有效操作期间信息234.处理器21在有效运营期。

3. 发明公开

EP3213224A1 IDENTIFYING AN INDIVIDUAL'S ABILITIES, SKILLS AND INTERESTS THROUGH GAMING DATA ANALYTICS 审中-公开
标题翻译：通过游戏数据分析确定个人的能力，技能和兴趣
公开(公告)号：EP3213224A1
公开(公告)日：2017-09-06
申请号：EP15854153.2
申请日：2015-10-27
申请人： Identifor Inc.
发明人： DO, Cuong , SCHOLAR, Wayne
IPC分类号： G06F17/00
CPC分类号： A63F13/798 , A63F13/67 , A63F13/85 , A63F2300/8064 , G06F7/02 , G06Q10/1053 , G09B5/06 , G09B19/00 , G09B19/025
摘要： Personal characteristic may be identified by receiving, at a server, game data indicative of a plurality of games, determining a first comparative game performance associated with a first game of the plurality of games, deriving a personal character from the first comparative game performance, and providing an indication of the personal characteristic. Each game of the plurality of games is designed to assess at least one personal characteristic. The personal characteristics may comprise abilities, skills, and/or interests. The first comparative game performance is determined, for example, based on the game data and comparative game information that is indicative of a comparison between game performance associated with the first game and respective game performance associated with at least one other game of the plurality of games.
摘要翻译：通过在服务器处接收指示多个游戏的游戏数据，确定与多个游戏中的第一游戏相关联的第一比较游戏性能，从第一比较游戏性能中导出个人角色，以及提供个人特征的指示。多个游戏中的每个游戏被设计为评估至少一个个人特征。个人特征可以包括能力，技能和/或兴趣。例如，基于游戏数据和比较游戏信息来确定第一比较游戏性能，该比较游戏信息指示与第一游戏相关联的游戏性能与与多个游戏中的至少一个其他游戏相关联的各游戏性能之间的比较。

4. 发明授权

EP2089793B1 SYSTEM AND METHOD FOR AN EFFICIENT COMPARISON OPERATION OF MULTI-BIT VECTORS IN A DIGITAL LOGIC CIRCUIT 有权
标题翻译：系统和方法用于在数字逻辑电路MEHRBITVEKTOREN的高效比较运算
公开(公告)号：EP2089793B1
公开(公告)日：2013-04-03
申请号：EP07853239.7
申请日：2007-12-05
申请人： Analog Devices, Inc.
发明人： GIRI, Abhijit
IPC分类号： G06F7/38
CPC分类号： G06F7/026 , G06F7/02 , G06F7/50

5. 发明公开

EP2483839A2 PROCESSOR 有权
标题翻译：处理器
公开(公告)号：EP2483839A2
公开(公告)日：2012-08-08
申请号：EP10763397.6
申请日：2010-09-28
申请人： QinetiQ Limited
发明人： ORCHARD, David, Arthur , WILSON, Rebecca, Anne , PRITCHARD, Jonathan, Alexander, Skoyles , COOPER, Martin, James , SHEPHERD, Terence, John , LEWIN, Andrew, Charles , TAPSTER, Paul, Richard , BENNETT, Charlotte, Rachel, Helen
IPC分类号： G06K9/74
CPC分类号： G06K9/74 , G06F7/02 , G06F2207/025
摘要： Apparatus (100) is provided which is arranged to accept an input data stream. In some embodiments, the apparatus (100) comprises a sampler arranged to sample the input data stream to provide k samples thereof, wherein each of the samples is n bits long and a string selector arranged to select m binary strings n bits long from at least a chosen subset of all random binary strings of a predetermined length. The apparatus (100) may further comprise a logical operator arranged to perform a logical function for each of the k samples with each of the selected binary strings to provide a vector, a memory arranged to store a matrix of the vectors generated from k samples, and an address generator arranged to generate RAM address segments from the matrix. In embodiments, the apparatus (100) may comprise a processor for, for example, pattern matching; feature detection, image recognition.
摘要翻译：提供装置（100），其被设置为接受输入数据流。在一些实施例中，所述设备（100）包括采样器，所述采样器被设置为对所述输入数据流进行采样以提供其k个采样，其中每个采样是n位长，并且串选择器被设置为从至少n位长的串预定长度的所有随机二进制串的选定子集。所述设备（100）可进一步包括逻辑运算符，所述逻辑运算符被安排为对于所述k个样本中的每一个执行逻辑函数，其中每个所选择的二进制字符串提供向量，存储器，被布置为存储从k个样本产生的向量的矩阵，以及地址生成器，被设置为从矩阵生成RAM地址段。在实施例中，装置（100）可以包括用于例如模式匹配的处理器; 特征检测，图像识别。

6. 发明公开

EP2382739A4 FILTER FOR NETWORK INTRUSION AND VIRUS DETECTION 审中-公开
标题翻译：过滤器，用于检测NETZWERKEINDRINGUNG和病毒
公开(公告)号：EP2382739A4
公开(公告)日：2012-06-27
申请号：EP09836863
申请日：2009-12-16
申请人： INTEL CORP
发明人： GOPAL VINODH , CLARK CHRISTOPHER F , WOLRICH GILBERT , FEGHALI WAJDI
IPC分类号： H04L29/06 , G06F21/20
CPC分类号： H04L63/145 , G06F7/02 , G06F17/30949 , G06F17/30985 , G06F21/567 , G06F2207/025 , H04L63/0245 , H04L63/1416

7. 发明公开

EP2437159A1 Operation apparatus and control method thereof 有权
标题翻译： Betriebsvorrichtung und Steuerungsverfahrendafür
公开(公告)号：EP2437159A1
公开(公告)日：2012-04-04
申请号：EP11195127.3
申请日：2011-05-05
申请人： Canon Kabushiki Kaisha
发明人： Ito, Tadayuki
IPC分类号： G06F7/02
CPC分类号： G06F12/0802 , G06F7/02
摘要： An apparatus (400, 500) comprising first holding units (300) each of which includes first nodes (310, 330) connected in series and shifts data in a first direction, second holding units (360) each of which includes second nodes (370, 380) connected in series and shifts data in a second direction is provided. Each first node corresponds to at least one of the second nodes. The apparatus further comprises an operation unit (320, 340) which executes at each shift timing, for a first node of interest, an operation using data in the node of interest, and data in at least one of the second nodes to which the node of interest corresponds, and an input unit (410, 480, 510, 580) which inputs, in parallel, data to at least two first holding units, and serially inputs data to at least two second holding units.
摘要翻译：一种包括第一保持单元（300）的装置（400,500），每个保持单元包括串联连接并沿第一方向移位数据的第一节点（310,330），第二保持单元（360）包括第二节点，380）串联连接并且在第二方向上移位数据。每个第一节点对应于至少一个第二节点。该装置还包括一个操作单元（320,340），该操作单元在每个移位定时对于感兴趣的第一节点执行使用感兴趣的节点中的数据的操作，以及至少一个第二节点的数据，以及输入单元（410,480,510,580），其将数据并行输入到至少两个第一保持单元，并且将数据串行输入至少两个第二保持单元。

8. 发明公开

EP2254040A3 Processing of data elements moving in opposite directions 有权
标题翻译：计数器移动的数据元素的处理
公开(公告)号：EP2254040A3
公开(公告)日：2011-04-27
申请号：EP10163311.3
申请日：2010-05-19
申请人： Canon Kabushiki Kaisha
发明人： Ito, Tadayuki
IPC分类号： G06F7/02
CPC分类号： G06F7/02
摘要： An information processing apparatus (200, 400) includes: a first pipeline (100, 300) for having first nodes, and moving data held in each first node to a first node located in a first direction; a second pipeline (160, 360) for having second nodes corresponding to the first nodes, and moving data held in each second node to a second node located in a second direction that is opposite to the first direction; a first comparison means (120) for comparing data held in a node of interest with data held in a second node corresponding to the node of interest, where the node of interest is one of the first nodes; and a second comparison means (140) for comparing the data held in the node of interest with data held in a second node located one node on an upstream or downstream side of the second node corresponding to the node of interest.

9. 发明授权

EP2040173B1 Data bus inversion detection mechanism 有权
标题翻译：机构，用于检测Datenbusdetektion
公开(公告)号：EP2040173B1
公开(公告)日：2010-04-28
申请号：EP07254065.1
申请日：2007-10-12
申请人： VIA Technologies, Inc.
发明人： Bertram, Raymond A.
IPC分类号： G06F13/40 , G06F7/60
CPC分类号： G06F13/4072 , G06F7/02 , G06F7/607

10. 发明公开

EP2023238A1 BINARY SEARCH CIRCUIT AND METHOD 审中-公开
标题翻译： SCHALTUNG UND VERFAHREN ZURBINÄRENSUCHE
公开(公告)号：EP2023238A1
公开(公告)日：2009-02-11
申请号：EP06746688.8
申请日：2006-05-22
申请人： Duaxes Corporation
发明人： NAGOYA, Mitsugu
IPC分类号： G06F7/04
CPC分类号： G06F7/02 , G06F2207/025
摘要： The present invention provides a technique for enabling high-speed binary search.
A binary search circuit 36 searches a database 50, which stores pieces of data aligned in ascending or descending order, for comparison target data by binary search. Comparison circuits 36A, 36B and 36C compare pieces of data read out from databases 50A, 50B and 50C with the comparison target data. A control circuit 36Z inputs each piece of data at the 1/2 n , 2/2 n , ..., and (2 n -1)/2 n positions in the search range of the database 50 into 2 n -1 comparison circuits respectively and allows the comparison circuits to compare the pieces of data thus input with the comparison target data, so as to perform n searchs simultaneously in parallel.
摘要翻译：本发明提供了一种用于实现高速二进制搜索的技术。二进制搜索电路36通过二进制搜索搜索数据库50，数据库50存储按升序或降序排列的数据，用于比较目标数据。比较电路36A，36B和36C将从数据库50A，50B和50C读出的数据与比较目标数据进行比较。控制电路36Z将数据库50的搜索范围内的1/2 n，2 / n，...和（2 n -1）/ 2 n个位置的每条数据输入2 n -1比较并且允许比较电路将如此输入的数据与比较目标数据进行比较，以便并行地执行n个搜索。

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