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    • 5. 发明授权
    • REFERENCE VOLTAGE CIRCUIT
    • 基准电压电路
    • EP1815303B1
    • 2009-01-07
    • EP05802337.5
    • 2005-11-11
    • NXP B.V.
    • DE CREMOUX, Guillaume
    • G05F3/24
    • G11C27/005
    • The present invention provides a reference voltage circuit making use of a non-volatile and non-modifiable storage of an electric charge. A tunable transformation module is adapted to transform a constant voltage corresponding to the constant stored charge into an output reference voltage. Further, a control loop provides tuning of the transformation module by means of an external calibration module with respect to a high precision reference voltage source. During a calibration procedure the transformation module is tuned in such a way that the output reference voltage equals the high precision reference voltage. After disconnecting reference voltage electronic circuit and calibration module, the output reference voltage is governed by the charge stored by means of the non-volatile storage and by the configuration of the tunable transformation module. It remains constant and accurate with respect to time and temperature and consumes only a minimum of electric current.
    • 6. 发明公开
    • MULTI-PURPOSE BATTERY CHARGING CIRCUIT
    • 多用途电池电路
    • EP1917708A2
    • 2008-05-07
    • EP06795602.9
    • 2006-08-07
    • NXP B.V.
    • DE CREMOUX, Guillaume
    • H02J7/00
    • H02J7/0068
    • The present invention relates to a multi-purpose battery charging circuit configuration able to be selectively in a simple charge mode when intended for low-end solutions (option 3) or in a charge-and-play mode when intended for medium- and high-end solutions (options 1 and 2 respectively), while maintaining the supply voltage of any portable and mobile electronic devices with an acceptable noise level. The selection will be made possible by the use of multiplexers (MUXl, MUX2). If the option 1 is chosen, the bi-directional switching device (210) will be controlled by a driver circuit (340) for allowing the current which flows through it towards the battery (20) to strongly increase and thereby maintaining the voltage across the circuitry (10) at a value slightly greater than the voltage across the battery (20). If the option 2 is chosen, the synchronous step-down voltage regulator (310) comprising at least the driver circuit (350) and the switching devices (200, 230) will track the voltages across the circuitry (10) and the battery (20) for regulating the voltage across the circuitry (10) at a value in the vicinity of the voltage across the battery (20). If the option 3 is chosen, the battery (20) which cannot be separated from the circuitry (10) will be in a simple charge mode while being charged through the switching device (210).
    • 7. 发明公开
    • CURRENT LIMITER CIRCUIT
    • 电流限制电路
    • EP1917567A1
    • 2008-05-07
    • EP06780103.5
    • 2006-07-17
    • NXP B.V.
    • DE CREMOUX, Guillaume
    • G05F1/56
    • G05F1/575
    • The present invention relates to a circuit configuration for detecting and rapidly limiting large current increase based on high current injection at the output terminal (out). In particular, a gate-controlled switching device (PO), controlled by a driver circuit (40) through a low resistive element (RO) and passed through by a current overshoot, will be alternatively driven by the circuit of the present invention while having its control terminal charged by the high injected current. Thus, when large voltage increase generated by a steep front impulse with a positive slope is detected by the capacitor (C) and transmitted to the gate terminal (GateN), the circuit of the present invention bypasses the driver circuit (40) while injecting a significant current peak issued from the transistor (P3) towards the gate terminal (GateP) of the gate-controlled switching device (PO), whereas the capacitor (C) is discharging very slowly through the gate terminal (GateN). The current amplification leading to the injected current peak is made through the use of the current mirror (P4, P3) with a large current mirror ratio and enhanced by the presence of the diodes (DO, Dl). In a quiescent mode or when large voltage decrease generated by a steep front impulse with a negative slope is detected by the capacitor (C) and transmitted to the gate terminal (GateN), the transistor (P4) becomes short-circuited by the current source (C S3) sourcing the current flowing through the diode (Dl), such that the current mirror (P4+P5, P3) is virtually replaced by the current mirror (P5, P3) with a much lower current mirror ratio. As a result, the low current of the sinking current source (CS2) will be sufficient to sink the lower current mirrored by the current mirror (P3, P5) and will then allow the driver circuit (40) to take over the control of the switching device (PO). Finally, this circuit configuration operates unidirectionally while limiting large current increase but not large current decrease through the gate-controlled switching device (PO).