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    • 1. 发明公开
    • A process for preparing insulating material having low dielectric constant
    • 一种用于生产绝缘的低介电常数的材料的过程
    • EP1150346A2
    • 2001-10-31
    • EP01303846.8
    • 2001-04-27
    • LG Chem Investment, Ltd
    • Ko, Min-jinNam, Hye-YeongShin, Dong-SeokKang, Jung-WonMoon, Myung-Sun
    • H01L21/316
    • H01L21/02126H01L21/02203H01L21/02216H01L21/02282H01L21/31695H01L21/76801H01L2924/0002Y10S438/96H01L2924/00
    • The present invention relates to low dielectric materials essential for a semiconductor having high density and high performance of the next generation, particularly to a process for preparing a porous interlayer insulating film having low dielectric constant containing pores with a size of a few nanometers or less.
      The present invention provides a process for preparing a porous wiring interlayer insulating film having very low dielectric constant for a semiconductor device comprising the steps of a) preparing a mixed complex of pore-forming organic molecules and a matrix resin, b) coating the mixed complex on a substrate, and c) heating the mixed complex to remove the organic molecules therefrom, thereby forming pores inside the complex.
      The porous wiring interlayer insulating film having very low dielectric constant prepared according to the process of the present invention has reduced phase-separation, excellent processibility, isotropic structure and very small pores with a size of a few nanometers or less.
    • 本发明涉及一种用于具有高密度和下一代高性能的半导体,特别涉及用于制备多孔层间绝缘具有膜的低介电常数含一个过程中必不可少的低介电材料的尺寸为几纳米米或以下的孔。 本发明提供了一种制备多孔布线层间绝缘具有薄膜非常低的介电常数的半导体装置,其包括以下步骤:a)制备成孔的有机分子的混合复合物和基体树脂,b)中涂覆所述混合复合 上的底物,和c)加热该混合复合物从那里除去有机分子,从而形成复杂的内部孔隙。 多孔布线层间绝缘膜具有 - 非常低的介电常数准备雅丁到本发明的方法减少了相分离,优良的加工性,各向同性结构和非常小的孔的尺寸为几纳米米或更少。