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1. 发明公开

EP0779623A3 Digital data transmitting method 失效
标题翻译：数字数据传送方法
公开(公告)号：EP0779623A3
公开(公告)日：2001-02-28
申请号：EP96119545.0
申请日：1996-12-05
申请人： KABUSHIKI KAISHA TOSHIBA , PIONEER ELECTRONIC CORPORATION , Hitachi, Ltd. , MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Kojima, Tadashi , Hirayama, Koichi , Yamada, Hisashi , Moriyama, Yoshiaki, Corp. Res. and Dev. Lab. , Yokogawa, Fumihiko, Corp. Res. and Dev. Lab. , Arai, Takao , Takeuchi, Toshifumi , Tanaka, Shinichi , Kurahashi, Akira , Shimada, Toshiyuki
IPC分类号： G11B20/14
CPC分类号： H03M5/145 , G11B20/1426 , H04L7/041 , H04L25/4906
摘要： A transmitting method of digital data whereby information data can be reproduced at a high precision. In order to retain digital data in sectors comprising a plurality of sync frames and sequentially transmit, the sync frame is comprised of the sync signal and the run length limited code which satisfies the limitations of the minimum run length and the maximum run length, and the sync signal includes the sync pattern constituted by a bit pattern of a run length that is longer than the maximum run length by only 3T and addition bit patterns which are arranged before and after the bit pattern and each of which has a run length that is longer than the minimum run length. The sync signal includes a specific code which indicates a position in the sector and which enables the DC control to be performed.

2. 发明授权

EP0098349B1 Frequency detecting circuit for digital information reproducing system 失效
标题翻译：用于数字信息再现系统的频率检测电路
公开(公告)号：EP0098349B1
公开(公告)日：1989-11-15
申请号：EP83102996.2
申请日：1983-03-25
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Nishikawa, Meisei , Nakamura, Yukio , Kojima, Tadashi
IPC分类号： G11B20/14 , G11B7/00 , G11B19/28 , G04F10/04
CPC分类号： G11B27/34 , G11B7/005 , G11B19/28 , G11B20/10527 , G11B20/1423 , G11B20/1806 , G11B27/10 , G11B2220/20

3. 发明授权

EP0047955B1 Wave-shaping circuit 有权转让
标题翻译：波形电路
公开(公告)号：EP0047955B1
公开(公告)日：1985-06-19
申请号：EP81107028.3
申请日：1981-09-07
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Todokoro, Shigeru , Kojima, Tadashi
IPC分类号： H03K5/08 , G11B5/09
CPC分类号： H03K5/084

4. 发明公开

EP0096164A3 Pulse-width modulation circuit 失效
标题翻译：脉冲宽度调制电路
公开(公告)号：EP0096164A3
公开(公告)日：1984-09-05
申请号：EP83102307
申请日：1983-03-09
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Nishikawa, Meisei , Nagumo, Masahide , Kojima, Tadashi
IPC分类号： H03K13/20 , H03K07/08 , G11B19/24
CPC分类号： G11B19/24 , H03K7/08
摘要： The invention provides a pulse-width modulation circuit in which an output from a latch circuit (136) for holding a count obtained by counting a reference clock signal in accordance with the period of a signal to be modulated is compared by a comparator (152) with an output from a ramp counter (153) for counting the reference clock signal at a predetermined period so as to perform a pulse-width modulation. The number of bits of the comparator (152) and the ramp counter (153) is decreased by n bits with respect to the number N (N > n) of bits of the latch circuit (136).

5. 发明公开

EP0096109A2 Error correcting system 失效
标题翻译：纠错系统。
公开(公告)号：EP0096109A2
公开(公告)日：1983-12-21
申请号：EP82109564.3
申请日：1982-10-15
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Nagumo, Masahide , Inagawa, June , Kojima, Tadashi
IPC分类号： G06F11/10 , G11B5/09
CPC分类号： H03M13/151 , G06F7/724 , G06F7/726 , G11B20/1809
摘要： An error correcting system uses an error location polynominal defined by double correction BCH codes each consisting of the elements of Galois field GF(2m), thereby to generate error locations σ 1 and σ 2 and error patterns e, and e 2 . The system has a first data processing system (401) for performing only additions and multiplications to generate error locations σ 1 and σ 2 and a second data processing system (402) for performing only additions and mutiplica- tions to generate error patterns e 1 and e 2 . The first data processing system (401) comprises a syndrome generator (41), a memory (43), an arithmetic logic unit (44), registers (45A) to (45C), latch circuits (46A) to (46F), registers (47A) to (47F), adder circuits (48A) and (48B) and a zero detector (49). The second data processing system (402) comprises a gate circuit (50), latch circuits (46H) and (46G), an arithmetic logic unit (44), registers (45A) to (45C) and a memory (43).

6. 发明公开

EP0053505A3 Pulse code modulated signal processing apparatus 有权转让
标题翻译：脉冲码调制信号处理装置
公开(公告)号：EP0053505A3
公开(公告)日：1983-07-06
申请号：EP81305641
申请日：1981-11-27
申请人： SONY CORPORATION , KABUSHIKI KAISHA TOSHIBA
发明人： Hoshimi, Susumu , Kojima, Tadashi
IPC分类号： G11B05/09 , H04L01/10
CPC分类号： G11B20/1809
摘要： A PCM signal processing apparatus is arranged to receive successive transmission blocks, each of which comprise time-interleaved PCM data, error correction and error detection words. The apparatus has an error detector (16) responsive to the error detection words for detecting errors in a received transmission block and error identifying means (18, 22, 23) for identifying errors in each of the time-interleaved words included in the received transmission block which has been detected. A de-interleaver (17) is provided for time-deinterleaving each received transmission block to recover a de-interleaved block comprising de-interleaved PCM and error correction words, with errors in the de-interleaved words being respectively identified. A syndrome generating device (18) is coupled to the de-interleaver (17) for generating error syndromes using the de-interleaved PCM and error correction words in the de-interleaved block. An error correcting device (20) responsive to the error syndromes corrects erroneous PCM words in the de-interleaved block as a function of the remaining error free PCM and the error correction words in the de-interleaved block. An error compensating device (21) is responsive to the identification of errors by the error identifying device and compensates the erroneous PCM words in the de-interleaved block with a substitute PCM word when error correction by the error correcting device (20) is impossible. An inhibit device (24) inhibits the error correcting device (20) when all of the error detection words in the de-interleaved block are identified as erroneous and it discontinues inhibiting when the relationship between the identification by the error identifying device and the error syndrome indicates that no error exists.

7. 发明公开

EP0052520A2 Pulse code modulation signal processing circuits 有权转让
标题翻译：对于脉冲编码调制信号的处理电路。
公开(公告)号：EP0052520A2
公开(公告)日：1982-05-26
申请号：EP81305444.2
申请日：1981-11-18
申请人： SONY CORPORATION , KABUSHIKI KAISHA TOSHIBA
发明人： Hoshimi, Susumo , Kojima, Tadashi
IPC分类号： G11B27/02 , G11B5/09
CPC分类号： G11B5/09 , G11B27/032 , G11B27/323 , G11B2220/90
摘要： A PCM signal processor having a signal input terminal which receives a PCM data signal from a PCM data signal reproducing apparatus such as a VTR (18R), a memory (14) for storing the PCM data signal, a standardized signal input terminal for providing a standardized signal corresponding to a synchronizing signal for synchronizing the VTR (18P), an address counter (38) for designating the address of the memory (14) which is to be read, and means for providing the address counter (38) with preset data in response to the standardized signal.

8. 发明授权

EP0893796B1 Information reproducing apparatus, information processing system and method, and authenticating method 失效
标题翻译：信息再现设备，信息处理系统和方法，和认证方法
公开(公告)号：EP0893796B1
公开(公告)日：2005-11-09
申请号：EP98113500.7
申请日：1998-07-20
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ando, Hideo , Nakagawa, Masaki , Ishizawa, Yoshiyuki , Kojima, Tadashi
IPC分类号： G11B20/00
CPC分类号： H04N21/4331 , G11B20/00086 , G11B20/0021 , H04N5/85 , H04N9/8042 , H04N9/8063 , H04N9/8205 , H04N9/8227

9. 发明公开

EP1553583A2 Recording medium, recording medium writing device, recording medium reading device, recording medium writing method, and recording medium reading method 审中-公开
标题翻译：记录介质，记录介质写入装置，记录介质读取装置，记录介质写入的方法，和记录介质读取方法
公开(公告)号：EP1553583A2
公开(公告)日：2005-07-13
申请号：EP04106960.0
申请日：2004-12-23
申请人： Kabushiki Kaisha Toshiba
发明人： Kojima, Tadashi , Yamada, Hisashi , Ishihara, Atsushi , Kato, Taku , Isozaki, Hiroshi , Matsushita, Tatsuyuki , Matsukawa, Shinichi
IPC分类号： G11B20/00 , G11B20/18
CPC分类号： G11B20/0021 , G11B20/00086 , G11B20/00289 , G11B20/00362 , G11B20/1833
摘要： Embedded proprietary data, which is configured by embedding decoding key data for decoding encoded contents into proprietary data that is a subject of ownership, is recorded on a recording medium. Since the decoding key data is embedded into the proprietary data, it is difficult to separate and take out the decoding key data from the proprietary data. When copying or the like including the proprietary data is performed, it becomes possible to legally pursue a copy or the like of the proprietary data.
摘要翻译：这是由用于嵌入编码的内容解码为专有的数据进行解码的密钥数据配置嵌入式专有数据，所有没有被所有权的对象被记录在记录介质上。因为解码密钥数据被嵌入到专用数据，这是难以从专有数据中分离并取出解码密钥数据。当复制或类似物包括专有的数据进行，就可以合法地追求复制或类似的专有数据。

10. 发明公开

EP1403869A2 Signal forming apparatus and method 失效
标题翻译： Vorrichtung und Verfahren zur Bildung eines信号
公开(公告)号：EP1403869A2
公开(公告)日：2004-03-31
申请号：EP03025667.1
申请日：1996-12-05
申请人： KABUSHIKI KAISHA TOSHIBA , PIONEER ELECTRONIC CORPORATION , Hitachi, Ltd. , MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Kojima, Tadashi , Hirayama, Koichi , Yamada, Hisashi , Moriyama, Yoshiaki, Corp. Res. and Dev. Lab. , Yokogawa, Fumihiko, Corp. Res. and Dev. Lab. , Arai, Takao , Takeuchi, Toshifumi , Tanaka, Shinichi , Kurahashi, Akira , Shimada, Toshiyuki
IPC分类号： G11B20/14 , H03M5/14
CPC分类号： H03M5/145 , G11B20/1426 , H04L7/041 , H04L25/4906
摘要： A transmitting method of digital data whereby information data can be reproduced at a high precision. In order to retain digital data in sectors comprising a plurality of sync frames and sequentially transmit, the sync frame is comprised of the sync signal and the run length limited code which satisfies the limitations of the minimum run length and the maximum run length, and the sync signal includes the sync pattern constituted by a bit pattern of a run length that is longer than the maximum run length by only 3T and addition bit patterns which are arranged before and after the bit pattern and each of which has a run length that is longer than the minimum run length. The sync signal includes a specific code which indicates a position in the sector and which enables the DC control to be performed.
摘要翻译：一种可以高精度地再现信息数据的信号形成装置。为了在包括多个同步帧的扇区中保留数字数据并顺序地发送，同步帧包括满足最小游程长度和最大游程长度的限制的同步信号和游程长度限制码，并且同步信号包括由长度比最大游程长度仅3T的游程长度的位模式构成的同步模式，以及排列在位模式之前和之后的游程长度更长的相加位模式比最小游程长。同步信号包括指示扇区中的位置并且能够执行DC控制的特定代码。

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