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1. 发明公开

EP0694826A2 Switching regulator and control method 失效
标题翻译：开关稳压器和控制方法
公开(公告)号：EP0694826A2
公开(公告)日：1996-01-31
申请号：EP95305186.9
申请日：1995-07-25
申请人： International Business Machines Corporation
发明人： Narita, Izuru , Iwami, Tomoyuki
IPC分类号： G05F1/577
CPC分类号： G05F1/577 , H02M3/33561
摘要： The present invention relates to an information processing apparatus that comprises a plurality of electric circuits and that has power supply lines for the individual electric circuits. It provides a switching regulator that controls the power that is supplied by an external power source to such an information processing apparatus, while inhibiting power waste, and the information processing apparatus and a method for its control.
The information processing apparatus, which is activated by power supplied from an external power source, comprises: a first power supply line for supplying power to a first electric circuitry; a second power supply line for supplying power to a second electric circuitry; a i-th power supply line for supplying power to a i-th electric circuitry (i is an integer of 1 ≦ i ≦ n, and n is an integer equal to 2 or greater); means for monitoring a first voltage of the first power supply line; means for monitoring a second voltage of the second power supply line; means for monitoring a i-th voltage of the i-th power supply line; means for selecting the minimum voltage among the first through the i-th voltages; means for comparing the minimum voltage with a previously given reference voltage; and connecting/disconnecting means for starting or halting the power supply from the external power source in response to the comparison result. As the lowest voltage can be used as a feedback target, the application of a high voltage is not required even if the safety of the system is taken into consideration and power will not be wasted.

2. 发明授权

EP0241655B1 Extended raster operating in a display system 失效
标题翻译：在显示系统中扩展的放大器操作
公开(公告)号：EP0241655B1
公开(公告)日：1993-01-27
申请号：EP87101587.1
申请日：1987-02-05
申请人： International Business Machines Corporation
发明人： Hattori, Etsuo , Iwami, Tomoyuki , Miyazaki, Yoshihiro , Ohbuchi, Ryutaroh
IPC分类号： G09G1/16
CPC分类号： G09G5/393

3. 发明公开

EP0241655A3 Extended raster operating in a display system 失效
标题翻译：在显示系统中扩展的RASTER操作
公开(公告)号：EP0241655A3
公开(公告)日：1990-03-21
申请号：EP87101587.1
申请日：1987-02-05
申请人： International Business Machines Corporation
发明人： Hattori, Etsuo , Iwami, Tomoyuki , Miyazaki, Yoshihiro , Ohbuchi, Ryutaroh
IPC分类号： G09G1/16
CPC分类号： G09G5/393
摘要： A display system has a frame buffer comprising a plurality of memory planes, a display device for visually displaying images written into the frame buffer, a controller for controlling image data operations and extended raster operation circuitry comprising an intraplane operation unit for performing operations, specified by the controller, on image data in each of the memory planes, and a separate interplane operation unit for performing operations, specified by the controller, on image data in at least two memory planes selected by the controller, the extended raster operation circuitry being so connected to the memory planes that the results thereof are written back to the frame buffer. The interplane operation unit consists of a plurality of operation circuits respectively corresponding to the plurality of memory planes, and a plurality of delay means respectively related to the plurality of operation circuits, each of the operation circuits receives, as the inputs, image data in a memory plane selected by the command and its own output delayed a predetermined period of time by the related delay means, and the final operation result only is written into the corresponding memory plane.

4. 发明公开

EP0241655A2 Extended raster operating in a display system 失效
标题翻译：埃里恩·安德里格
公开(公告)号：EP0241655A2
公开(公告)日：1987-10-21
申请号：EP87101587.1
申请日：1987-02-05
申请人： International Business Machines Corporation
发明人： Hattori, Etsuo , Iwami, Tomoyuki , Miyazaki, Yoshihiro , Ohbuchi, Ryutaroh
IPC分类号： G09G1/16
CPC分类号： G09G5/393
摘要： A display system has a frame buffer comprising a plurality of memory planes, a display device for visually displaying images written into the frame buffer, a controller for controlling image data operations and extended raster operation circuitry comprising an intraplane operation unit for performing operations, specified by the controller, on image data in each of the memory planes, and a separate interplane operation unit for performing operations, specified by the controller, on image data in at least two memory planes selected by the controller, the extended raster operation circuitry being so connected to the memory planes that the results thereof are written back to the frame buffer. The interplane operation unit consists of a plurality of operation circuits respectively corresponding to the plurality of memory planes, and a plurality of delay means respectively related to the plurality of operation circuits, each of the operation circuits receives, as the inputs, image data in a memory plane selected by the command and its own output delayed a predetermined period of time by the related delay means, and the final operation result only is written into the corresponding memory plane.
摘要翻译：显示系统具有包括多个存储器平面的帧缓冲器，用于可视地显示写入帧缓冲器中的图像的显示装置，用于控制图像数据操作的控制器和扩展光栅操作电路，其包括用于执行操作的行星内操作单元，控制器对每个存储器平面中的图像数据和用于执行由控制器指定的操作的单独的平面间操作单元对由控制器选择的至少两个存储器平面中的图像数据进行控制，扩展光栅操作电路被连接将其结果写回到帧缓冲器的存储器平面。平面间操作单元由分别对应于多个存储器平面的多个操作电路和分别与多个操作电路相关的多个延迟装置组成，每个操作电路作为输入接收图像数据由命令选择的存储器平面及其自身的输出通过相关的延迟装置延迟预定的时间段，并且最终的操作结果仅被写入相应的存储器平面。

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