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1. 发明公开

EP1024499A2 Semiconductor memory device and method of operation 失效
公开(公告)号：EP1024499A2
公开(公告)日：2000-08-02
申请号：EP00106045.8
申请日：1991-08-02
申请人： HITACHI, LTD.
发明人： Saito, Ryuichi , Kobayashi, Yutaka , Onose, Hidekatsu , Ohue, Michio
IPC分类号： G11C11/22
CPC分类号： H01L27/11502 , G11C8/14 , G11C11/22 , G11C11/5657 , G11C16/08 , H01L27/10805
摘要： A semiconductor memory device has a plurality of memory cells (351,352,353,354) in an array, into which the memory cells (351,352,353,354) data is writable, and which can subsequently be read. Each memory cell has a switching element (111) with one terminal connected to a bit line (120) of the array another terminal connected to at least one ferroelectric capacitor (112,113,114,115), and a control terminal connected to a word line (121). The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor (427) and a capacitor (428) other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality (112,113,114,115) of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.

2. 发明公开

EP1024498A2 Semiconductor memory device and method of operation 失效
公开(公告)号：EP1024498A2
公开(公告)日：2000-08-02
申请号：EP00106044.1
申请日：1991-08-02
申请人： HITACHI, LTD.
发明人： Saito, Ryuichi , Kobayashi, Yutaka , Onose, Hidekatsu , Ohue, Michio
IPC分类号： G11C11/22
CPC分类号： H01L27/11502 , G11C8/14 , G11C11/22 , G11C11/5657 , G11C16/08 , H01L27/10805
摘要： A semiconductor memory device has a plurality of memory cells (351,352,353,354) in an array, into which the memory cells (351,352,353,354) data is writable, and which can subsequently be read. Each memory cell has a switching element (111) with one terminal connected to a bit line (120) of the array another terminal connected to at least one ferroelectric capacitor (112,113,114,115), and a control terminal connected to a word line (121). The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor (427) and a capacitor (428) other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality (112,113,114,115) of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.

3. 发明公开

EP1033756A3 Semiconductor device having a lightly doped layer and power converter comprising the same 审中-公开
标题翻译：一种半导体器件，包括具有相同的轻掺杂层和功率转换器
公开(公告)号：EP1033756A3
公开(公告)日：2003-05-21
申请号：EP00104286.0
申请日：2000-03-01
申请人： Hitachi, Ltd.
发明人： Onose, Hidekatsu , Yatsuo, Tsutomu , Ohno, Toshiyuki , Oikawa, Saburou
IPC分类号： H01L29/36 , H01L29/06 , H02M7/538
CPC分类号： H01L29/0615 , H02M7/003
摘要： In a semiconductor device such as a pn-junction diode, a Schottky diode, a JFET, a MOSFET or a MESFET, a drift layer is made of two layers, a first layer (12) and a second layer (13) having the same conductivity type as that of the first layer (12) and being disposed on said first layer (12), a termination region being formed on the surface of said second layer (13). The impurity concentration of the second layer (13) is less than half that of the first layer (12). The thickness of the second layer may moreover be made smaller than that of a main layer (14) of the device. In accordance with the above features, the field intensity is reduced at the termination region of the device.

4. 发明授权

EP0677877B1 Insulating gate type semiconductor device and power inverter using such a device 失效
标题翻译：一种半导体器件，包括使用这样的部件绝缘栅功率逆变器
公开(公告)号：EP0677877B1
公开(公告)日：2002-06-12
申请号：EP95301707.6
申请日：1995-03-15
申请人： Hitachi, Ltd.
发明人： Takayanagi, Yuji , Kobayashi, Hideo , Sakurada, Shuroku , Onose, Hidekatsu
IPC分类号： H01L29/417 , H01L29/10 , H01L29/739 , H01L29/78 , H01L23/051 , H01L23/482
CPC分类号： H01L29/7802 , H01L23/051 , H01L23/4824 , H01L29/1095 , H01L29/41741 , H01L29/7395 , H01L2924/0002 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： An insulated gate type semiconductor device has a gate electrode (21) which controls current flow between two regions (10,13) of the same conductivity type in a semiconductor substrate. A main electrode (31) has a first portion contacting a first one of the two regions (10,13), a second portion extending above the gate electrode (21) and a third portion (32) providing a raised external contact surface to contact an external electrode (100). The gate electrode is insulated above and below by insulating films (20,21). To prevent damage to the gate electrode (21) and the lower insulating films (20) due to the pressure of the external electrode (100), there is a supporting insulating layer on the surface of the substrate underlying the contact portion (32) of the main electrode and having a thickness substantially greater than the thickness of the insulating film (20) below the gate electrode and the contact surface (32) is more remote from the substrate than the second portion of said main electrode.

5. 发明公开

EP0694964A3 Semiconductor device and package structure therefor and power inverter having semiconductor device 失效
标题翻译：半导体器件和封装结构和它与Leistungsinvertor该半导体装置，
公开(公告)号：EP0694964A3
公开(公告)日：1996-07-10
申请号：EP95305151.3
申请日：1995-07-24
申请人： HITACHI, LTD.
发明人： Onose, Hidekatsu , Sakurada, Shuroku
IPC分类号： H01L23/051 , H01L23/48
CPC分类号： H01L23/051 , H01L24/72 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01021 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01042 , H01L2924/01082 , H01L2924/1301 , H01L2924/1305 , H01L2924/19041 , H01L2924/30107 , H01L2924/00
摘要： An auxiliary cathode lead (24) is contacted to a cathode buffer electrode (32) which contacts to an unit GTO arranged at the most remote region from a gate pressure contacting portion (33) of a GTO pellet (10) and the push-into effect of the auxiliary cathode current during the turn-off can be remarkably performed. Without inviting bad affects such as the increase in "on" voltage, it is proposed a package structure of a semiconductor which the unit GTO arranged remote from a gate is easily to perform the turn-off. The maximum turn-off current can be heightened, it can easily correspond to the increase in the diameter of the pellet according to the large current of the unit element. Further, a condenser of a snubber circuit as a protection circuit of the unit GTO in a power inverter can be small, and the snubber loss can be lessened.

6. 发明公开

EP0469934A2 Semiconductor memory device and method of operation thereof 失效
标题翻译： Betriebsverfahren und Anordnung eines Halbleiterspeichers。
公开(公告)号：EP0469934A2
公开(公告)日：1992-02-05
申请号：EP91307157.7
申请日：1991-08-02
申请人： HITACHI, LTD.
发明人： Saito, Ryuichi , Onose, Hidekatsu , Kobayashi, Yutaka , Ohue, Michio
IPC分类号： G11C11/22 , G11C11/56
CPC分类号： H01L27/11502 , G11C8/14 , G11C11/22 , G11C11/5657 , G11C16/08 , H01L27/10805
摘要： A semiconductor memory device has a plurality of memory cells (351,352,353,354) in an array, into which the memory cells (351,352,353,354) data is writable, and which can subsequently be read. Each memory cell has a switching element (111) with one terminal connected to a bit line (120) of the array another terminal connected to at least one ferroelectric capacitor (112,113,114,115), and a control terminal connected to a word line (121). The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor (427) and a capacitor (428) other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality (112,113,114,115) of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.
摘要翻译：半导体存储器件具有阵列中的多个存储单元（351,352,353,354），存储单元（351,352,353,354）数据可写入到其中，并随后可以被读取。每个存储单元具有开关元件（111），一个端子连接到与至少一个铁电电容器（112,113,114,115）连接的阵列另一端子的位线（120），以及连接到字线（121）的控制端子。然后，当施加不足以引起铁电体电容器的状态改变的电压时，可以操作电池以检测铁电电容器的极化变化。或者，除了铁电电容器之外的铁电电容器（427）和电容器（428）连接到开关元件。在另一替代方案中，多个（112,113,114,115）铁电电容器连接到开关元件，使得不同的数据可写入每个。

7. 发明授权

EP0469934B1 Semiconductor memory device and method of operation thereof 失效
标题翻译：操作的方法和装置的半导体存储器的
公开(公告)号：EP0469934B1
公开(公告)日：2001-12-12
申请号：EP91307157.7
申请日：1991-08-02
申请人： Hitachi, Ltd.
发明人： Saito, Ryuichi , Onose, Hidekatsu , Kobayashi, Yutaka , Ohue, Michio
IPC分类号： G11C11/22 , G11C11/56
CPC分类号： H01L27/11502 , G11C8/14 , G11C11/22 , G11C11/5657 , G11C16/08 , H01L27/10805

8. 发明公开

EP1033756A2 Semiconductor device having a lightly doped layer and power converter comprising the same 审中-公开
标题翻译： Halbleiteranordnung mit einer leichtdotierten Schicht und Leistungswandler mit derselben
公开(公告)号：EP1033756A2
公开(公告)日：2000-09-06
申请号：EP00104286.0
申请日：2000-03-01
申请人： Hitachi, Ltd.
发明人： Onose, Hidekatsu , Yatsuo, Tsutomu , Ohno, Toshiyuki , Oikawa, Saburou
IPC分类号： H01L29/36 , H01L29/06 , H02M7/538
CPC分类号： H01L29/0615 , H02M7/003
摘要： In a semiconductor device such as a pn-junction diode, a Schottky diode, a JFET, a MOSFET or a MESFET, a drift layer is made of two layers, a first layer (12) and a second layer (13) having the same conductivity type as that of the first layer (12) and being disposed on said first layer (12), a termination region being formed on the surface of said second layer (13). The impurity concentration of the second layer (13) is less than half that of the first layer (12). The thickness of the second layer may moreover be made smaller than that of a main layer (14) of the device. In accordance with the above features, the field intensity is reduced at the termination region of the device.
摘要翻译：在诸如pn结二极管，肖特基二极管，JFET，MOSFET或MESFET的半导体器件中，漂移层由两层制成，第一层（12）和具有该层的第二层（13）导电类型与第一层（12）的导电类型相同，并且设置在所述第一层（12）上，终端区域形成在所述第二层（13）的表面上。第二层（13）的杂质浓度小于第一层（12）的杂质浓度的一半。另外可以使第二层的厚度小于装置的主层（14）的厚度。根据上述特征，在设备的终端区域减小场强。

9. 发明公开

EP1024497A2 Semiconductor memory device and method of operation 失效
标题翻译： Betriebsverfahren und Anordnung eines Halbleiterspeichers
公开(公告)号：EP1024497A2
公开(公告)日：2000-08-02
申请号：EP00106043.3
申请日：1991-08-02
申请人： HITACHI, LTD.
发明人： Saito, Ryuichi , Kobayashi, Yutaka , Onose, Hidekatsu , Ohue, Michio
IPC分类号： G11C11/22
CPC分类号： H01L27/11502 , G11C8/14 , G11C11/22 , G11C11/5657 , G11C16/08 , H01L27/10805
摘要： A semiconductor memory device has a plurality of memory cells (351,352,353,354) in an array, into which the memory cells (351,352,353,354) data is writable, and which can subsequently be read. Each memory cell has a switching element (111) with one terminal connected to a bit line (120) of the array another terminal connected to at least one ferroelectric capacitor (112,113,114,115), and a control terminal connected to a word line (121). The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor (427) and a capacitor (428) other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality (112,113,114,115) of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.
摘要翻译：半导体存储器件具有阵列中的多个存储单元（351,352,353,354），存储单元（351,352,353,354）数据可写入到其中，并随后可以被读取。每个存储单元具有开关元件（111），一个端子连接到与至少一个铁电电容器（112,113,114,115）连接的阵列另一端子的位线（120），以及连接到字线（121）的控制端子。然后，当施加不足以引起铁电体电容器的状态改变的电压时，可以操作电池以检测铁电电容器的极化变化。或者，除了铁电电容器之外的铁电电容器（427）和电容器（428）连接到开关元件。在另一替代方案中，多个（112,113,114,115）铁电电容器连接到开关元件，使得不同的数据可写入每个。

10. 发明公开

EP0694964A2 Semiconductor device and package structure therefor and power inverter having semiconductor device 失效
标题翻译：半导体器件和封装结构和它与Leistungsinvertor该半导体装置，
公开(公告)号：EP0694964A2
公开(公告)日：1996-01-31
申请号：EP95305151.3
申请日：1995-07-24
申请人： HITACHI, LTD.
发明人： Onose, Hidekatsu , Sakurada, Shuroku
IPC分类号： H01L23/051 , H01L23/48
CPC分类号： H01L23/051 , H01L24/72 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01021 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01042 , H01L2924/01082 , H01L2924/1301 , H01L2924/1305 , H01L2924/19041 , H01L2924/30107 , H01L2924/00
摘要： An auxiliary cathode lead (24) is contacted to a cathode buffer electrode (32) which contacts to an unit GTO arranged at the most remote region from a gate pressure contacting portion (33) of a GTO pellet (10) and the push-into effect of the auxiliary cathode current during the turn-off can be remarkably performed. Without inviting bad affects such as the increase in "on" voltage, it is proposed a package structure of a semiconductor which the unit GTO arranged remote from a gate is easily to perform the turn-off. The maximum turn-off current can be heightened, it can easily correspond to the increase in the diameter of the pellet according to the large current of the unit element. Further, a condenser of a snubber circuit as a protection circuit of the unit GTO in a power inverter can be small, and the snubber loss can be lessened.
摘要翻译：的辅助阴极引线（24）沉淀物接触，阴极缓冲电极（32），其接触到在最远端区域从一个GTO（10）的栅压接部分（33）排列的单元GTO和推入可以显着地进行关断期间辅助阴极电流的效果。而不会引起不良影响：如“开”电压的增加，它提出了一种半导体，其从门远程布置在单元GTO容易执行关断的封装结构。的最大关断电流可被提高，它可以很容易地对应于粒料gemäß到单元元件的大电流的直径的增加。此外，一个缓冲器电路，如一个功率逆变器的单位GTO的保护电路的冷凝器可以是小的，和缓冲器损耗可以减小。

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