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    • 5. 发明公开
    • Isolated bidirectional DC-DC Converter
    • Bidirektionaler Gleichspannungstrennwandler
    • EP1677410A1
    • 2006-07-05
    • EP05018082.7
    • 2005-08-19
    • HITACHI, LTD.
    • Shoji, HiroyukiKanouda, AkihikoSaito, RyuichiYukutake, SeigouHiguchi, Katsuhiro
    • H02M3/335
    • H02M1/34H02M3/33584H02M2001/342Y02B70/1491
    • The DC-DC converter connects a first and a second switching circuit for converting power mutually between direct current and alternating current respectively to a first DC power source 10 and a second DC power source 90 and has a transformer 40 between the AC terminals thereof. Here, between the AC terminals of the second switching circuit and the negative pole terminal of the DC power source 90, a voltage clamp circuit 70 composed of a series unit of switching devices 21 and 23 with a reverse parallel diode and a clamp condenser 71 is connected.
      An isolated bidirectional DC-DC converter which prevents a reduction in a circulating current at time of buck and an occurrence of a surge voltage at time of voltage boost and realizes highly efficiency, low noise, and miniaturization is provided.
    • DC-DC转换器将用于将直流和交流之间的电力相互转换的第一和第二开关电路分别连接到第一直流电源10和第二直流电源90,并且在其AC端子之间具有变压器40。 这里,在第二开关电路的交流端子和直流电源90的负极端子之间,由具有反向并联二极管的开关器件21和23的串联单元和钳位电容器71构成的电压钳位电路70是 连接的。 提供一种隔离的双向DC-DC转换器,其防止降压时的循环电流的降低和在升压时的浪涌电压的发生,并且实现高效率,低噪声和小型化。
    • 7. 发明公开
    • Semiconductor memory device and method of operation
    • Betriebsverfahren und Anordnung eines Halbleiterspeichers
    • EP1024497A2
    • 2000-08-02
    • EP00106043.3
    • 1991-08-02
    • HITACHI, LTD.
    • Saito, RyuichiKobayashi, YutakaOnose, HidekatsuOhue, Michio
    • G11C11/22
    • H01L27/11502G11C8/14G11C11/22G11C11/5657G11C16/08H01L27/10805
    • A semiconductor memory device has a plurality of memory cells (351,352,353,354) in an array, into which the memory cells (351,352,353,354) data is writable, and which can subsequently be read. Each memory cell has a switching element (111) with one terminal connected to a bit line (120) of the array another terminal connected to at least one ferroelectric capacitor (112,113,114,115), and a control terminal connected to a word line (121). The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor (427) and a capacitor (428) other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality (112,113,114,115) of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.
    • 半导体存储器件具有阵列中的多个存储单元(351,352,353,354),存储单元(351,352,353,354)数据可写入到其中,并随后可以被读取。 每个存储单元具有开关元件(111),一个端子连接到与至少一个铁电电容器(112,113,114,115)连接的阵列另一端子的位线(120),以及连接到字线(121)的控制端子。 然后,当施加不足以引起铁电体电容器的状态改变的电压时,可以操作电池以检测铁电电容器的极化变化。 或者,除了铁电电容器之外的铁电电容器(427)和电容器(428)连接到开关元件。 在另一替代方案中,多个(112,113,114,115)铁电电容器连接到开关元件,使得不同的数据可写入每个。