专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP1867122A4 AGC WITH INTEGRATED WIDEBAND INTERFERER DETECTION 审中-公开
标题翻译：与综合宽带检测干扰AGC
公开(公告)号：EP1867122A4
公开(公告)日：2011-10-19
申请号：EP06735900
申请日：2006-02-23
申请人： FREESCALE SEMICONDUCTOR INC
发明人： HUGHES JAMES DAVID , FREYTAG LYNN R , RAHMAN MAHIBUR
IPC分类号： H04L27/38 , H03G1/00 , H03G3/30 , H04B1/10
CPC分类号： H04L27/3809 , H03G1/0088 , H03G3/3068 , H03G3/3078 , H04B1/109

2. 发明公开

EP1851851A4 CLOSED LOOP POWER CONTROL WITH HIGH DYNAMIC RANGE 审中-公开
标题翻译：功率控制闭环高动态范围
公开(公告)号：EP1851851A4
公开(公告)日：2010-12-22
申请号：EP05854005
申请日：2005-12-14
申请人： FREESCALE SEMICONDUCTOR INC
发明人： RAHMAN MAHIBUR , IVONNET JORGE , PREMAKANTHAN PRAVINKUMAR
IPC分类号： H03G3/30
CPC分类号： H03G3/3047

3. 发明公开

EP2074701A4 CONTROLLING THE BANDWIDTH OF AN ANALOG FILTER 审中-公开
标题翻译：控制模拟滤波器的带宽
公开(公告)号：EP2074701A4
公开(公告)日：2009-12-30
申请号：EP07841572
申请日：2007-08-30
申请人： FREESCALE SEMICONDUCTOR INC
发明人： RAHMAN MAHIBUR , PARKES JOHN J , RICHES JAMES J
IPC分类号： H04B1/66
CPC分类号： H04B1/30 , H03H11/1256 , H03H11/1291 , H03H2210/012 , H03H2210/015 , H03H2210/025 , H03H2210/036

4. 发明公开

EP1869855A4 DC OFFSET CORRECTION SYSTEM FOR A RECEIVER WITH BASEBAND GAIN CONTROL 有权
标题翻译： DC偏移校正系统与基带增益控制的接收器
公开(公告)号：EP1869855A4
公开(公告)日：2013-05-01
申请号：EP06736439
申请日：2006-02-28
申请人： FREESCALE SEMICONDUCTOR INC
发明人： RAHMAN MAHIBUR , SHAH MANISH N , SOBCHAK CHARLES L
IPC分类号： H04L27/08 , H04L25/06
CPC分类号： H04L25/061 , H03D3/008 , H03G3/3068 , H04B1/30

5. 发明公开

EP1869818A4 METHODS AND APPARATUS FOR BIT SYNCHRONIZING DATA TRANSFERRED ACROSS A MULTI-PIN ASYNCHRONOUS SERIAL INTERFACE 审中-公开
标题翻译： FOR BIT同步数据的方法和装置有关与多个插口异步串行接口传输
公开(公告)号：EP1869818A4
公开(公告)日：2011-01-26
申请号：EP06739496
申请日：2006-03-24
申请人： FREESCALE SEMICONDUCTOR INC
发明人： RAHMAN MAHIBUR , QUIROGA EMILLO J
IPC分类号： H04L7/033 , H04L7/04 , H04L25/14
CPC分类号： H04L7/0338 , H04L7/04
摘要： Methods, devices and systems are provided for bit synchronizing multiple serial bitstreams ( 106 ) with a common clock signal ( 116 ). Activity occurring in each bitstream is detected ( 304 ) for each of a plurality of phases corresponding to cycles of the common clock signal. One of the plurality of phases is selected ( 308 ) for each of the serial bitstreams based upon the activity detected within the selected phase. Data is then extracted ( 322 ) from the selected phase for each of the serial bitstreams using the common clock signal to thereby bit synchronize each of the plurality of serial bitstreams to each other.
摘要翻译：提供了用于比特同步多个串行比特流（106）与一个共同的时钟信号（116）的方法，装置和系统。活动中的每个比特流中发生的被检测到（304）针对每个阶段对应于共同时钟信号的周期中的多个。一相的多个被选择（308）用于每个基于所选择的相位内检测到的活动的串行比特流。然后数据被提取（322）从针对每个使用公共时钟信号，从而同步位每个串行比特流海誓山盟的多个串行位流的所选择的相位。

6. 发明公开

EP1917714A4 ADAPTIVE TRANSMIT POWER CONTROL SYSTEM 无效
标题翻译： ADAPTIVES SENDELEISTUNGSREGELSYSTEM
公开(公告)号：EP1917714A4
公开(公告)日：2008-09-03
申请号：EP04810478
申请日：2004-11-04
申请人： FREESCALE SEMICONDUCTOR INC
发明人： PREMAKANTHAN PRAVINKUMAR , RAHMAN MAHIBUR
IPC分类号： H03B1/00 , H03G3/30
CPC分类号： H03G3/3047
摘要： An adaptive closed loop transmit power control system which does not require extensive factory calibration of power control loop bandwidths and feedback detect path gain settings over the power transition ranges, frequency bands of operation, temperature, and supply voltage is disclosed. The system automatically compensates for any gain or slope variations in the analog feedforward and feedback paths to maintain system stability and meet performance specifications. The system achieves this by using an adaptive digital signal processing (DSP) system architecture within the feedback path of this closed loop power control system. The system eliminates the need for extensive factory calibration of such parameters as loop bandwidths and feedback detect path gain settings over power transition ranges, frequency bands of operation, temperature, and supply voltage.
摘要翻译：公开了一种自适应闭环发射功率控制系统，其不需要功率控制环路带宽的大量工厂校准，并且在功率转换范围，操作频带，温度和电源电压上检测路径增益设置。系统会自动补偿模拟前馈和反馈路径中的任何增益或斜率变化，以保持系统稳定性并满足性能规格。该系统通过在该闭环功率控制系统的反馈路径内使用自适应数字信号处理（DSP）系统架构来实现此目的。该系统不需要大量工厂校准环路带宽等参数，并可在功率转换范围，工作频段，温度和电源电压范围内反馈检测路径增益设置。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式