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1. 发明公开

EP1058193A1 Method and apparatus for pre-processing data packets in a bus interface unit 审中-公开
标题翻译：一种用于在Datenbusschnittstelleneinheit数据分组的前处理的方法和数据处理装置
公开(公告)号：EP1058193A1
公开(公告)日：2000-12-06
申请号：EP99110490.2
申请日：1999-05-31
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Brune, Thomas , Ostermann, Ralf , Cahnbley, Jens , Schweidler, Siegfried
IPC分类号： G06F13/40 , H04L29/06
CPC分类号： H04L12/40117 , H04L69/22
摘要： The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. A problem exists due to the fact that the header data of the IEEE1394 data packets consists of 32 bit words which have to be interpreted as 32 bit words in the connected application data processing unit (30). The IEEE1394 bus interface unit (20) is defined to be of big endian type. In a little endian type application data processor (30) the data word order can only be correctly interpreted after a byte order change. According to the invention the byte order change is performed in the data link layer unit (21) automatically with hardware circuitry for the header quadlets of asynchronous data packets only.
摘要翻译： IEEE1394总线的通信协议有三层：物理层，链路层，和事务处理层。链路层IC实现该接口到外部应用程序并用于发送所述总线上的数据准备，或从IEEE1394总线解释输入数据分组。物理层IC实现到总线上的直接电连接，并且控制许多功能，包括仲裁总线上发送数据。一个问题，存在由于factthat的IEEE1394的数据分组的哪些必须被解释为在所连接的应用程序数据处理单元（30）32个字的32位字besteht的标题数据。 IEEE1394总线接口单元（20）被定义为大端类型。在一个小端类型的应用程序的数据处理器（30）中的数据词序只能正确字节顺序变化之后解释。。据字节顺序变化在数据链路层单元（21）具有用于仅异步数据分组的报头四字节组硬件电路自动地执行本发明。

2. 发明公开

EP1694023A1 Method for performing data transport over a serial bus using internet protocol and apparatus for use in the method 审中-公开
标题翻译：用于使用互联网协议通过串行总线进行数据传输的方法和装置
公开(公告)号：EP1694023A1
公开(公告)日：2006-08-23
申请号：EP05090033.1
申请日：2005-02-18
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Dorau, Kai , Köhler, Ralf , Brune, Thomas
IPC分类号： H04L29/06
CPC分类号： H04L29/06 , H04L29/06027 , H04L65/608 , H04L65/80 , H04L69/16
摘要： Real time streaming over serial buses (20) using Internet protocol IP is becoming more and more important. With new bus technologies e.g. 10Gbit Ethernet even streaming in HD cinematography quality and uncompressed form becomes possible. In this case, however, data access management by software means is critical or simply not possible for performance reasons even if high performance microcontrollers are used where the software runs.
The invention proposes for an apparatus in a network to implement hardware means (26, 27, 28) for processing the real-time critical data packets as well as software means for processing the real-time uncritical data packets and a filter algorithm respectively a de-multiplexer (25) for analyzing packet header and passing the real-time critical data packets to the hardware means (26, 27, 28) and the real-time uncritical data packets to the software means.
摘要翻译：实时流在使用互联网协议IP串行总线（20）正变得越来越重要。随着新的总线技术E.G. 万兆以太网甚至流高清摄影的质量和压缩的形式成为可能。在这种情况下，但是，通过软件方式的数据访问管理是出于性能方面的关键或根本不可能的，即使高性能微控制器所使用的软件运行在那里。本发明的网络中，在装置提出了一种用于实现硬件装置（26，27，28），用于处理所述的实时关键的数据分组以及软件装置，用于处理实时关键数据分组，并且一个过滤器算法分别解复用器（25），用于分析分组报头和实时关键的数据分组传递到所述硬件装置（26，27，28）和实时关键数据包发送到软件的装置。

3. 发明公开

EP1253750A1 Method for the control of network devices connected via a bus system 审中-公开
标题翻译： Verfahren zur Steuerung vonübereinen汽车发明网Netzwerkgeräten
公开(公告)号：EP1253750A1
公开(公告)日：2002-10-30
申请号：EP01109980.1
申请日：2001-04-24
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Hütter, Ingo , Brune, Thomas
IPC分类号： H04L12/28 , H04L29/06
CPC分类号： H04L12/2814 , H04L12/2803 , H04L12/2805 , H04L12/2809 , H04L29/06 , H04L2012/2849
摘要： Two or more electronic devices (1, 3, 4) are connected via a bus system (5), wherein one of the network devices controls (1) other network devices (3, 4). A first control application is uploaded from a first controlled device to the control device and a second control application is uploaded from a second controlled device into the first control application. The first and second controlled devices can be operated simultaneously using a single user interface shown on a display of the control device. The user interface of the first device is displayed as main user interface and the user interface of the second device is rendered within the main interface as reduced user interface, which includes only operation elements necessary for operation of the second device in combination with the first device. The generation of combined user interfaces is also possible when the second controlled device comprises features, which are not known at the production of the first controlled device.
摘要翻译：两个或多个电子设备（1,3,4）经由总线系统（5）连接，其中一个网络设备控制（1）其他网络设备（3,4）。将第一控制应用从第一控制设备上传到控制设备，并且将第二控制应用从第二受控设备上传到第一控制应用中。可以使用控制装置的显示器上所示的单个用户界面同时操作第一和第二受控设备。第一设备的用户界面被显示为主用户界面，并且第二设备的用户界面在主界面内呈现为简化的用户界面，其仅包括与第一设备结合操作第二设备所需的操作元素。当第二受控设备包括在生产第一受控设备时不知道的特征，组合的用户界面的产生也是可能的。

4. 发明公开

EP1035682A1 Method and bus interface employing a memory in an integrated circuit for linking a bus with an application device 审中-公开
标题翻译：方法和总线接口到存储器中的集成电路，用于连接的数据总线与应用设备
公开(公告)号：EP1035682A1
公开(公告)日：2000-09-13
申请号：EP99250067.8
申请日：1999-03-06
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Schweidler, Siegfried , Brune, Thomas
IPC分类号： H04L1/00 , H04L29/06
CPC分类号： H04L49/9057 , H04L1/0061 , H04L1/0072 , H04L12/40058 , H04L12/40071 , H04L49/90 , H04L49/901 , H04L49/9036 , H04L49/9084 , H04L49/9089
摘要： The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. According to the invention the capacity of the on-chip memory becomes assigned in a flexible way in order to be able to meet the requirements for any specific service. Further, the on-chip memory is prevented from storing data packets containing transmission errors by CRC checking on the fly header data and other data. This is performed for asynchronous data packets as well as isochronous data packets, and allows to have a minimum on-chip memory capacity only.
摘要翻译： IEEE1394总线的通信协议有三层：物理层，链路层，和事务处理层。链路层IC实现该接口到外部应用程序并用于发送所述总线上的数据准备，或从IEEE1394总线解释输入数据分组。物理层IC实现到总线上的直接电连接，并且控制许多功能，包括仲裁总线上发送数据。为了。据片上存储器的容量以灵活的方式成为分配本发明以能够满足任何特定的服务的要求。此外，片上存储器从存储通过CRC在飞行头数据和其它数据检查包含传输错误的数据包阻止。这被执行用于异步数据包以及同步数据信息包，并且允许仅具有最小的片上存储器容量。

5. 发明公开

EP1513157A1 Method for multibank memory scheduling 审中-公开
标题翻译： Zugriffsverfahrenfüreinen Multibankspeicher
公开(公告)号：EP1513157A1
公开(公告)日：2005-03-09
申请号：EP03019948.3
申请日：2003-09-02
申请人： Deutsche Thomson-Brandt GmbH
发明人： Niggemeier, Tim , Brune, Thomas
IPC分类号： G11C7/10 , G06F12/06
CPC分类号： G11C7/1042
摘要： The present invention relates to a method for scheduling and controlling access to a multibank memory having at least two banks (1, 2), and to an apparatus for reading from and/or writing to recording media using such method.
According to the invention, the method comprises the steps of:

writing an input stream (6) to the first bank (1);
switching the writing of the input stream (6) to the second bank (2) when a read command for the first bank (1) is received; and
switching the writing of the input stream (6) back to the first bank (1) when a read command for the second bank (2) is received.
摘要翻译：本发明涉及一种用于调度和控制对具有至少两个存储体（1,2）的多存储器存取的方法，以及一种用于使用这种方法从记录介质读取和/或写入记录介质的装置。根据本发明，该方法包括以下步骤：将输入流（6）写入第一存储体（1）; 当接收到第一组（1）的读取命令时，将输入流（6）的写入切换到第二存储体（2）以及当接收到用于所述第二组（2）的读取命令时，将所述输入流（6）的写入切换回所述第一存储体（1）。

6. 发明公开

EP1199847A1 Method for the data exchange between network devices 审中-公开
标题翻译： VerfahrenfürDatenustausch zwischenNetzgeräten
公开(公告)号：EP1199847A1
公开(公告)日：2002-04-24
申请号：EP00122864.2
申请日：2000-10-20
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Brune, Thomas , Hütter, Ingo
IPC分类号： H04L12/40 , H04B1/20 , H04N7/10
CPC分类号： H04L12/2814 , H04B1/202 , H04L12/2805 , H04L12/2838 , H04L12/40032 , H04L12/40084 , H04L12/40117 , H04L2012/2849 , H04N21/4223 , H04N21/43615 , H04N21/43622 , H04N21/43632 , H04N21/4438 , H04N21/47217
摘要： Two or more electronic devices are connected via a bus system (5) building a cluster or chain of devices (1, 3). A device can be selected using a control device (1), wherein an user interface (6) for the selected device is generated based on description data which are stored in the selected device and are transferred to the control device. A single user interface is shown on a display of the control device which allows to operate at least two devices (1, 3) simultaneously. The user interface of a first device is displayed as main user interface and the user interface of a second device is rendered within the main interface as reduced user interface (9) which includes only operation elements necessary for operation of the second device in combination with the first device.
摘要翻译：两个或多个电子设备经由构建集群或设备链（1,3）的总线系统（5）连接。可以使用控制设备（1）来选择设备，其中，基于存储在所选设备中并被传送到控制设备的描述数据来生成用于所选设备的用户界面（6）。在控制设备的显示器上显示单个用户界面，其允许同时操作至少两个设备（1,3）。显示第一设备的用户界面作为主用户界面，并且将第二设备的用户界面呈现在主界面内，作为简化用户界面（9），其仅包括操作第二设备所需的操作元素第一个设备。

7. 发明公开

EP1059590A1 Method for pre-processing packets in a bus interface 有权
标题翻译：韦斯特法伦Vorverarbeitung von Datenpaketen在einer Busschnittstelle
公开(公告)号：EP1059590A1
公开(公告)日：2000-12-13
申请号：EP00110251.6
申请日：2000-05-19
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Brune, Thomas , Ostermann, Ralf , Cahnbley, Jens , Schweidler, Siegfried
IPC分类号： G06F13/40 , H04L29/06
CPC分类号： H04L69/22
摘要： The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. A problem exists due to the fact that the header data of the IEEE1394 asynchronous data packets consists of 32 bit words which have to be interpreted as 32 bit words in the connected application data processing unit (30). The IEEE1394 bus interface unit (20) is defined to be of big endian type. In a little endian type application data processor (30) the data word order can only be correctly interpreted after a byte order change. According to the invention the byte order change is performed in the data link layer unit (21) automatically with hardware circuitry for asynchronous data packets.
摘要翻译： IEEE1394总线通信协议有三层：物理层，链路层和事务层。链路层IC实现与外部应用的接口，并准备用于在总线上发送的数据，或解释来自IEEE1394总线的输入数据分组。物理层IC实现与总线的直接电连接，并控制许多功能，包括在总线上发送数据的仲裁。由于IEEE1394异步数据包的标题数据由连接的应用数据处理单元（30）中必须被解释为32位字的32位字组成，所以存在问题。 IEEE1394总线接口单元（20）被定义为大端子类型。在一个小端序型应用数据处理器（30）中，数据字顺序只能在字节顺序改变后才能正确解释。根据本发明，在数据链路层单元（21）中，用异步数据分组的硬件电路自动执行字节顺序改变。

8. 发明公开

EP1037424A1 Method and Bus Interface for linking a bus with an application device 有权
标题翻译： Verfahren und Busschnittstelle zur Verbindung eines Buses mit einer Anwendungsvorrichtung
公开(公告)号：EP1037424A1
公开(公告)日：2000-09-20
申请号：EP00103618.5
申请日：2000-02-21
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Schweidler, Siegfried , Brune, Thomas
IPC分类号： H04L1/00 , H04L29/06
CPC分类号： H04L12/40058 , H04L1/0061 , H04L12/40071 , H04L49/90 , H04L49/9057 , H04L49/9084 , H04L49/9089
摘要： The IEEE1394 bus communication protocol has three layers:
physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. According to the invention the capacity of the on-chip memory becomes assigned in a flexible way in order to be able to meet the requirements for any specific service. Further, the on-chip memory is prevented from storing data packets containing transmission errors by CRC checking on the fly header data and other data. This is performed for asynchronous data packets as well as isochronous data packets, and allows to have a minimum on-chip memory capacity only.
摘要翻译： IEEE1394总线通信协议有三层：物理层，链路层和事务层。链路层IC实现与外部应用的接口，并准备用于在总线上发送的数据，或解释来自IEEE1394总线的输入数据分组。物理层IC实现与总线的直接电连接，并控制许多功能，包括在总线上发送数据的仲裁。根据本发明，以灵活的方式分配片上存储器的容量，以便能够满足任何特定服务的要求。此外，片上存储器被防止通过对毛头数据和其他数据的CRC校验来存储包含传输错误的数据分组。这是针对异步数据包和同步数据包执行的，并且允许仅具有最小的片上存储器容量。

9. 发明授权

EP1037424B1 Method and Bus Interface for linking a bus with an application device 有权
标题翻译：方法和总线接口，用于与应用程序装置的总线的连接
公开(公告)号：EP1037424B1
公开(公告)日：2007-09-12
申请号：EP00103618.5
申请日：2000-02-21
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Schweidler, Siegfried , Brune, Thomas
IPC分类号： H04L1/00 , H04L29/06
CPC分类号： H04L12/40058 , H04L1/0061 , H04L12/40071 , H04L49/90 , H04L49/9057 , H04L49/9084 , H04L49/9089

10. 发明公开

EP1484667A1 Method for fast verification of sector addresses 审中-公开
标题翻译：快速验证扇区地址的方法
公开(公告)号：EP1484667A1
公开(公告)日：2004-12-08
申请号：EP03012784.9
申请日：2003-06-05
申请人： DEUTSCHE THOMSON-BRANDT GMBH
发明人： Brune, Thomas
IPC分类号： G06F3/06 , G11B20/10 , G11B27/30 , G11B27/36
CPC分类号： G06F3/061 , G06F3/0638 , G06F3/0656 , G06F3/0658 , G06F3/0677 , G11B27/3027 , G11B27/36
摘要： A method and a device for the fast verification of sector addresses (9) in a data stream (2) obtained from a recording medium (1) upon a request from a microcontroller (13), the method comprising the steps of:

reading the data stream (2) from the recording medium (1);
decoding the data stream (2) to obtain a decoded data stream comprising user data (6) and sector addresses (9);
comparing the sector addresses (9) with a range (12) of valid sector addresses; and
transmitting only user data (8) having sector addresses (9) within the range (12) of valid sector addresses;
whereby dedicated comparing means (10) are provided for performing the comparing step independently of the microcontroller (13).
摘要翻译：一种用于在来自微控制器（13）的请求时从记录介质（1）获得的数据流（2）中快速验证扇区地址（9）的方法和设备，该方法包括以下步骤：读取数据来自记录介质（1）的流（2）; 解码数据流（2）以获得包括用户数据（6）和扇区地址（9）的解码数据流; 将扇区地址（9）与有效扇区地址的范围（12）进行比较; 并且仅发送具有在有效扇区地址的范围（12）内的扇区地址（9）的用户数据（8）由此提供专用比较装置（10）以独立于微控制器（13）执行比较步骤。

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