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1. 发明公开

EP2207194A4 SEMICONDUCTOR DEVICE OF SOI (Silicon on insulator) STRUCTURE, AND ITS MANUFACTURING METHOD 审中-公开
标题翻译： WITH SOI结构（绝缘体上的硅）及其制造方法半导体布置
公开(公告)号：EP2207194A4
公开(公告)日：2013-01-23
申请号：EP08841352
申请日：2008-10-20
申请人： DENSO CORP , SHINETSU HANDOTAI KK
发明人： OHTSUKI HIROSHI , KATADA MITSUTAKA , NOTO NOBUHIKO , TAKENO HIROSHI , YOSHIDA KAZUHIKO
IPC分类号： H01L21/02 , H01L21/322 , H01L21/336 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/32 , H01L29/786
CPC分类号： H01L29/78609 , H01L21/26506 , H01L21/3221 , H01L21/3223 , H01L21/3226 , H01L21/76256 , H01L21/76264 , H01L21/84 , H01L27/1203 , H01L29/32 , H01L29/7849 , H01L29/78603
摘要： In a SOI structure semiconductor device using a SOI substrate 100, a lattice distortion layer 4 is formed by implanting Ar ions into a silicon substrate as an active layer 3. The lattice distortion layer 4 is capable of serving as a gettering site. The dose amount of Ar ions is adjusted in such a manner that tensile stress in the lattice distortion layer 4 is equal to or greater than 11MPa and equal to or less than 27MPa. Thus, the lattice distortion layer 4 can prevent occurrence of a leakage current while serving as the gettering site.

2. 发明公开

EP2012346A4 SOI WAFER MANUFACTURING METHOD 有权转让
标题翻译： SOI晶片的制造方法
公开(公告)号：EP2012346A4
公开(公告)日：2010-09-29
申请号：EP07741675
申请日：2007-04-16
申请人： SHINETSU HANDOTAI KK
发明人： YOSHIDA KAZUHIKO , MATSUMINE MASAO , TAKENO HIROSHI
IPC分类号： H01L21/02 , H01L21/322 , H01L27/12
CPC分类号： H01L21/76256 , H01L21/26506

3. 发明公开

EP1408540A4 PRODUCTION METHOD FOR ANNEAL WAFER AND ANNEAL WAFER 审中-公开
标题翻译：处理对烘烤片和烘烤WAFER
公开(公告)号：EP1408540A4
公开(公告)日：2008-12-10
申请号：EP02741301
申请日：2002-06-25
申请人： SHINETSU HANDOTAI KK
发明人： KOBAYASHI NORIHIRO , TAMATSUKA MASARO , NAGOYA TAKATOSHI , QU WEI FEIG , TAKENO HIROSHI , AIHARA KEN
IPC分类号： C30B33/00 , H01L21/322 , H01L21/324
CPC分类号： H01L21/324 , C30B29/06 , C30B33/00 , H01L21/3225
摘要： A production method for an anneal wafer which heat−treats a silicon single crystal wafer at least 200 mm in diameter, produced by a Czochralski (CZ) method, under an atmosphere of argon gas, hydrogen gas or a mixture gas of these at temperatures as high as 1100−1350°C for 10−600 min, characterized in that a pre−anneal is carried out at temperatures lower than the above high heat treating temperature prior to the high−temperature heat treating to thereby grow oxygen deposits and restrict the growth of slip dislocation. The production method for an anneal wafer and an anneal wafer which restrict the occurrence and growth of slip dislocation to be caused by high−temperature heat treating and reduce the defect density of a wafer surface layer even in the case of a silicon single crystal wafer large in diameter of at least 200 mm.

4. 发明公开

EP1406294A4 SILICON WAFER MANUFACTURING METHOD, SILICON EPITAXIAL WAFER MANUFACTURING METHOD, AND SILICON EPITAXIAL WAFER 审中-公开
标题翻译：工艺硅片，方法外延硅芯片和外延硅芯片
公开(公告)号：EP1406294A4
公开(公告)日：2007-09-12
申请号：EP02726467
申请日：2002-05-23
申请人： SHINETSU HANDOTAI KK
发明人： TAKENO HIROSHI
IPC分类号： H01L21/322
CPC分类号： H01L21/3225
摘要： A silicon wafer or silicon epitaxial wafer manufacturing method for adding an excellent−stability IG capability by realizing both a high density of oxygen precipitate and a large size at the stage before the device process. The silicon wafer manufacturing method in which the silicon wafer is heat−treated so as to impart a gettering capability to the silicon wafer comprises at least three steps: a temperature−increasing step A for forming oxygen precipitation nuclei, a temperature−increasing step B for growing the oxygen precipitation nuclei, and a constant temperature−holding step C for further growing the oxygen precipitate larger.

5. 发明公开

EP1806769A4 SOI WAFER MANUFACTURING METHOD AND SOI WAFER 有权转让
标题翻译：处理对SOI晶片SOI晶片
公开(公告)号：EP1806769A4
公开(公告)日：2010-10-13
申请号：EP05778598
申请日：2005-09-09
申请人： SHINETSU HANDOTAI KK
发明人： AGA HIROJI , KOBAYASHI NORIHIRO , IMAI MASAYUKI , ENOMOTO TATSUO , TAKENO HIROSHI
IPC分类号： H01L21/02 , H01L27/12
CPC分类号： H01L21/76254 , H01L21/3226

6. 发明公开

EP1326270A4 SILICON WAFER AND SILICON EPITAXIAL WAFER AND PRODUCTION METHODS THEREFOR 有权
标题翻译：硅片上外延硅芯片及其制造方法
公开(公告)号：EP1326270A4
公开(公告)日：2007-07-18
申请号：EP01965659
申请日：2001-09-14
申请人： SHINETSU HANDOTAI KK
发明人： QU W F , HAYAMIZU Y , TAKENO HIROSHI
IPC分类号： H01L21/208 , C30B33/00 , H01L21/322 , H01L21/324
CPC分类号： C30B29/06 , C30B33/00 , H01L21/3225
摘要： A silicon wafer having a DZ layer in the vicinity of the surface thereof and an oxygen deposition layer in a bulk unit, wherein each of interstitial oxygen concentrations in the DZ layer, the oxygen deposition layer and in a transition layer between the DZ layer and the oxygen deposition layer is up to 8 ppma; a silicon epitaxial wafer having an epitaxial layer formed on the surface of this silicon wafer; and a production method of a silicon wafer, comprising the steps of growing a silicon single-crystal rod having an initial interstitial oxygen concentration of 10-25 ppma by a CZ method, processing the silicon single-crystal rod into a wafer, and subjecting the wafer to a first heat treating at 950-1050 DEG C for 2-5 hours, a second heat treating at 450-550 DEG C for 4-10 hours, a third heat treating at 750-850 DEG C for 2-8 hours, and a fourth heat treating at 950-1100 DEG C for 8-24 hours, whereby providing the production method of a silicon wafer capable of ensuring a high resistivity despite a device production heat treating.

7. 发明公开

EP1127962A4 METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL, SILICON SINGLE CRYSTAL MANUFACTURED BY THE METHOD, AND SILICON WAFER 有权
标题翻译：工艺用于生产制作的硅和硅晶片
公开(公告)号：EP1127962A4
公开(公告)日：2002-03-20
申请号：EP00956805
申请日：2000-08-30
申请人： SHINETSU HANDOTAI KK
发明人： IIDA MAKOTO , KIMURA MASANORI , TAKENO HIROSHI , HAYAMIZU YOSHINORI
IPC分类号： C30B15/00 , C30B15/20 , C30B29/06 , H01L21/322
CPC分类号： C30B15/206 , C30B29/06
摘要： A method for manufacturing a silicon single crystal by the Czochralski method, wherein a silicon single crystal containing impurities the kind and concentration of which are the same as those of a silicon single crystal to be manufactured is grown, an aggregation temperature zone of grown-in defects is determined, the condition of growth of the silicon single crystal or the temperature distribution in the puller furnace is determined according to the temperature so that the cooling rate of the crystal passing through the aggregation temperature zone may be a desired value, and a silicon single crystal containing impurities of predetermined kind and concentration is manufactured. A silicon single crystal in which the density of LSTD before heat treatment is 500 pieces/cm or more and the mean defect size is 70 nm or less is disclosed. Further a silicon single crystal manufactured by the Czochralski method in which the variations of the size and density of grown-in defects are efficiently controlled, and the quality is stable irrespective of the type of the crystal, a silicon wafer, and a method for manufacturing the same are also disclosed.
摘要翻译：一种用于生产在雅舞蹈的硅单晶与CZ方法，其特征在于在方法生产具有杂质的预定种类和浓度的晶体之前那样，要生产具有杂质的相同的种类和浓度随着晶体另一硅单晶生长从而确定性矿团聚的温度区生缺陷它们，然后基于该温度，要生产的晶体的生长条件或拉伸装置的熔炉内的温度分布设定搜索做了晶体的冷却速度为通过凝聚温度区是一个希望的速率，从而制得硅单晶。在雅舞蹈产生上述方法的单晶硅，其特征在于在没有LSTDs的密度进行热处理前为500个/ cm <2>以上且平均缺陷尺寸为70nm或更小。本发明通过CZ方法提供了一种硅单晶和硅晶片worin在尺寸和生缺陷的密度的分散体有效地抑制和质量不管各种晶体，并为此制造方法稳定化。

8. 发明公开

EP2149898A4 SOI WAFER MANUFACTURING METHOD 有权
公开(公告)号：EP2149898A4
公开(公告)日：2011-01-19
申请号：EP08738597
申请日：2008-04-16
申请人： SHINETSU HANDOTAI KK
发明人： YOKOKAWA ISAO , TAKENO HIROSHI , NOTO NOBUHIKO
IPC分类号： H01L21/02 , H01L21/223 , H01L27/12
CPC分类号： H01L21/76256

9. 发明公开

EP1475829A4 SILICON EPITAXIAL WAFER AND ITS PRODUCTION METHOD 审中-公开
标题翻译：用于生产外延硅晶片AND PROCESS
公开(公告)号：EP1475829A4
公开(公告)日：2008-01-23
申请号：EP03701761
申请日：2003-01-17
申请人： SHINETSU HANDOTAI KK
发明人： TAKENO HIROSHI
IPC分类号： H01L21/322
CPC分类号： H01L21/3225
摘要： A silicon epitaxial wafer having an excellent IG capability over its whole surface and a method for producing the same. The concentration of oxygen precipitates found in a silicon single crystal wafer after the epitaxial growing is 1 x 109/cm3 in any region in the surface of the wafer.

10. 发明公开

EP1035236A4 SILICON SINGLE CRYSTAL WAFER, EPITAXIAL SILICON WAFER, AND METHOD FOR PRODUCING THEM 审中-公开
标题翻译：晶硅晶片的外延硅晶片上并制作为VERFFAHREN
公开(公告)号：EP1035236A4
公开(公告)日：2007-01-10
申请号：EP99940537
申请日：1999-08-27
申请人： SHINETSU HANDOTAI KK
发明人： TAMATSUKA MASARO , AIHARA KEN , MIKI KATSUHIKO , TAKENO HIROSHI , HAYAMI YOSHINORI
IPC分类号： C30B15/00 , H01L21/322 , C30B29/06
CPC分类号： C30B29/06 , C30B15/00 , H01L21/3225
摘要： A boron heavily-doped silicon wafer, an antimony doped silicon wafer, and a phosphorous doped silicon wafer each used for epitaxial growth, having a low oxygen concentration, easily allowing oxygen deposition in spite of the low oxygen concentration, and having a high gettering ability, and an epitaxial silicon wafer including an epitaxial layer which is grown on a substrate wafer which is any of the doped silicon wafer and has an extremely low heavy metal impurity concentration are produced with high productivity and supplied. The invention provides a boron doped single crystal silicon wafer, an antimony doped single crystal silicon wafer, or a phosphorus doped single crystal silicon wafer having a resistivity of 10 to 100 m OMEGA .cm and produced by growing a silicon single crystal rod by a Czochralski method while doping it with nitrogen and slicing the rod. The invention also provides an epitaxial wafer having an epitaxial layer on the surface of any of the doped silicon wafers and a method for producing such doped wafers and epitaxial wafer.

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