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1. 发明公开

EP1755226A2 Delta - sigma modulators with improved noise performance 审中-公开
标题翻译： Delta-Σ调制器具有改善的噪声性能
公开(公告)号：EP1755226A2
公开(公告)日：2007-02-21
申请号：EP06125016.3
申请日：2003-04-01
申请人： Cirrus Logic, Inc.
发明人： Melanson, John Laurent , Yang, YuQing
IPC分类号： H03M3/00
CPC分类号： H03M3/368 , H03M3/424 , H03M3/452
摘要： An integrator stage for use in a delta sigma modulator includes an operational amplifier (312), an integration capacitor (CI) coupling to an output of the operational amplifier (312) and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors (+/-Cref) having first plates coupled electrically in common at a common plate node and switching circuitry (310 a-d) for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch (305 a-b) for selectively coupling the common plate node and the summing node during an integration phase.
摘要翻译：用于Δ-Σ调制器中的积分器级包括运算放大器（312），耦合到运算放大器（312）的输出端的积分电容器（CI）和运算放大器的输入端处的求和节点，以及反馈路径。反馈路径包括具有在公共板节点共同电耦合的第一板的第一和第二电容器（+/- Cref）以及用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路（310a-d）。积分器级还包括用于在积分阶段期间选择性地耦合公共板节点和求和节点的开关（305a-b）。

2. 发明公开

EP1755226A3 Delta - sigma modulators with improved noise performance 审中-公开
标题翻译： Delta-Sigma Modulatoren mit verbesserterRauschleistungsfähigkeit
公开(公告)号：EP1755226A3
公开(公告)日：2007-05-30
申请号：EP06125016.3
申请日：2003-04-01
申请人： Cirrus Logic, Inc.
发明人： Melanson, John Laurent , Yang, YuQing
IPC分类号： H03M3/00
CPC分类号： H03M3/368 , H03M3/424 , H03M3/452
摘要： An integrator stage for use in a delta sigma modulator includes an operational amplifier (312), an integration capacitor (CI) coupling to an output of the operational amplifier (312) and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors (+/-Cref) having first plates coupled electrically in common at a common plate node and switching circuitry (310 a-d) for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch (305 a-b) for selectively coupling the common plate node and the summing node during an integration phase.
摘要翻译：用于Δ-Σ调制器的积分器级包括运算放大器（312），耦合到运算放大器（312）的输出的积分电容器（CI）和运算放大器的输入处的求和节点路径。反馈路径包括第一和第二电容器（+/- Cref），其具有在公共板节点处共同电耦合的第一板和用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路（310a-d）。积分器级还包括用于在积分阶段期间选择性地耦合公共板节点和求和节点的开关（305a-b）。

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