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1. 发明公开

EP3944301A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR 审中-实审
公开(公告)号：EP3944301A1
公开(公告)日：2022-01-26
申请号：EP21785747.3
申请日：2021-03-26
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , YING, Zhan , ZHANG, Qiang
IPC分类号： H01L21/8242
摘要： A method for manufacturing a semiconductor structure includes: providing a substrate (1), in which the substrate (1) includes a plurality of first trenches (12) and first patterns (11) are formed between adjacent ones of the plurality of first trenches (12); forming a first dielectric layer (2) which covers at least the sidewalls of the first patterns (11); and segmenting the first patterns (11) to form second patterns (111).

2. 发明公开

EP3975253A1 SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREFOR, AND MEMORY AND FORMATION METHOD THEREFOR 有权
公开(公告)号：EP3975253A1
公开(公告)日：2022-03-30
申请号：EP21797863.4
申请日：2021-04-12
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , PING, Erxuan
IPC分类号： H01L27/108 , H01L27/088 , H01L21/8234
摘要： A semiconductor structure and a method for forming the same, and a memory and a method for forming the same are provided. The method for forming the semiconductor structure includes: providing a substrate, in which a sacrificial layer and an active layer on the sacrificial layer are formed on the substrate; patterning the active layer and the sacrificial layer to form grooves which divide the active layer and the sacrificial layer into a plurality of active areas; filling the grooves to form a first isolation layer surrounding the active areas; patterning the active layer in the active areas to form a plurality of separate active patterns; removing the sacrificial layer via openings between adjacent active patterns to form gaps between bottoms of the active patterns and the substrate; forming bit lines in the gaps; and forming semiconductor pillars on partial tops of the active patterns. By the method, a planar size of a transistor can be reduced, and a storage density of the memory can be increased.

3. 发明公开

EP3944300A1 METHOD FOR PREPARING SEMICONDUCTOR STRUCTURE 有权
公开(公告)号：EP3944300A1
公开(公告)日：2022-01-26
申请号：EP21785736.6
申请日：2021-03-26
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , YING, Zhan , ZHANG, Qiang
IPC分类号： H01L21/8242
摘要： The present invention provides a method for manufacturing a semiconductor structure. The method includes that: a substrate having a plurality of first trenches is provided. A first pattern is formed between two adjacent first trenches. A first dielectric layer is formed. The first dielectric layer covers at least side walls of the first pattern. A second dielectric layer is formed. The second dielectric layer fills the first trenches. The first pattern is severed to form a second pattern. The second dielectric layer is removed.

4. 发明公开

EP3933922A1 SEMICONDUCTOR STRUCTURE, FORMING METHOD THEREFOR AND MEMORY 审中-实审
公开(公告)号：EP3933922A1
公开(公告)日：2022-01-05
申请号：EP21765539.8
申请日：2021-04-26
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , PING, Erxuan
IPC分类号： H01L27/108 , H01L21/8242
摘要： A semiconductor structure, a method for forming the semiconductor structure and a memory are provided. The method includes: providing a substrate, wherein a sacrificial layer and an active layer located on the sacrificial layer are formed on the substrate; etching the active layer and the sacrificial layer up to a surface of the substrate to form a plurality of active lines arranged in parallel and extending along a first direction; filling an opening located between two adjacent ones of the active lines to form a first isolating layer; etching an end of the active lines to form an opening hole; removing the sacrificial layer along the opening hole, to form a gap between a bottom of the active lines and the substrate; filling a conductive material in the gap to form a bit line extending along the first direction; patterning the active lines to form a plurality of separate active pillars that are arrayed along the first direction and a second direction; and forming semiconductor pillars on top surfaces of respective ones of the active pillars. The method for forming the semiconductor structure is favorable for improving the integration level and performance of a transistor and improving the storage density of the memory.

5. 发明公开

EP4145511A1 SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREFOR, MEMORY AND FORMATION METHOD THEREFOR 审中-实审
公开(公告)号：EP4145511A1
公开(公告)日：2023-03-08
申请号：EP20934120.5
申请日：2020-11-11
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , PING, Erxuan
IPC分类号： H01L27/088
摘要： The present invention relates to a semiconductor structure and its forming method, and a memory and its forming method. The semiconductor structure includes a substrate, a vertical transistor on the substrate, and a bit line connected to the bottom of the vertical transistor and disposed between the bottom of the vertical transistor and the substrate. The vertical transistor in such a semiconductor structure has a relatively small plane dimension.

6. 发明公开

EP3975251A1 SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR, MEMORY AND FORMING METHOD THEREFOR 有权
公开(公告)号：EP3975251A1
公开(公告)日：2022-03-30
申请号：EP21797030.0
申请日：2021-04-12
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , PING, Erxuan
IPC分类号： H01L27/088 , H01L21/8234 , H01L27/108 , H01L27/11507 , H01L27/22 , H01L27/24 , H01L21/8242
摘要： This application relates to a semiconductor structure and a forming method therefor, and a memory and a forming method therefor. The method for forming the semiconductor structure includes: providing a substrate, forming a sacrificial layer and an active layer on the sacrificial layer on the substrate; etching the active layer and the sacrificial layer to form active lines extending along a first direction; forming a first isolation layer that fills a spacing between the active lines; etching ends of the active lines to form openings, and exposing the sacrificial layer on side walls of the openings; removing the sacrificial layer along the openings, and forming gaps between a bottom of the active lines and the substrate; and filling the gaps with a conductive material to form bit lines extending along the first direction. The method for forming the semiconductor structure is conducive to improving integration density and performance of transistors, thereby increasing a memory storage density.

7. 发明公开

EP3933921A1 SEMICONDUCTOR STRUCTURE, METHOD FOR FORMING SAME, AND MEMORY 有权
公开(公告)号：EP3933921A1
公开(公告)日：2022-01-05
申请号：EP21766093.5
申请日：2021-04-26
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , PING, Erxuan
IPC分类号： H01L27/088 , H01L21/8234 , H01L27/108
摘要： This application relates to a semiconductor structure and a method for forming the semiconductor structure and a memory. The method for forming the semiconductor structure includes: providing a substrate, where a sacrificial layer and an active layer located on the sacrificial layer are formed on the substrate; patterning the active layer and the sacrificial layer to form a groove, where the active layer and the sacrificial layer are divided into a plurality of active regions by the groove; forming a first isolation layer surrounding the active regions in the groove; patterning the active layer in the active regions to form a plurality of separate active patterns, where at least one of side walls or ends of the active patterns is connected to the first isolation layer; removing the sacrificial layer along an opening located between two adjacent one of the active patterns to form a gap between a bottom of the active patterns and the semiconductor substrate; and forming a bit line in the gap. The above method can reduce the planar size of a transistor and improve the storage density of the memory.

8. 发明公开

EP4344385A1 SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR 审中-实审
公开(公告)号：EP4344385A1
公开(公告)日：2024-03-27
申请号：EP22922574.3
申请日：2022-08-17
申请人： Changxin Memory Technologies, Inc.
发明人： XIAO, Deyuan , CAO, Kanyu , ZHU, Yiming
IPC分类号： H10B69/00
摘要： Embodiments of the disclosure provide a semiconductor structure and a method for manufacturing the same. The semiconductor structure includes: a substrate; a semiconductor pillar located on the substrate and a gate pillar located on the semiconductor pillar, in which the semiconductor pillar and the gate pillar both extend in a direction perpendicular to a plane of the substrate; a first word line extending in a first direction parallel to the plane of the substrate and surrounding the semiconductor pillar; and a semiconductor layer located above the semiconductor pillar and at least surrounding a sidewall of the gate pillar.

9. 发明公开

EP4145510A1 SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR, AND MEMORY AND FORMING METHOD THEREFOR 审中-实审
公开(公告)号：EP4145510A1
公开(公告)日：2023-03-08
申请号：EP20932910.1
申请日：2020-10-20
申请人： Changxin Memory Technologies, Inc.
发明人： ZHU, Yiming , PING, Erxuan
IPC分类号： H01L27/088 , H01L27/11507
摘要： The present invention relates to a semiconductor structure and a method for forming the same, and a memory and a method for forming the same. The method for forming the semiconductor structure includes: providing a substrate on which a sacrificial layer and an active layer located on the sacrificial layer are formed; patterning the active layer to form several discrete active pillars; removing the sacrificial layer to form a gap; forming a bit line within the gap; and forming a semiconductor pillar on the top of the active pillar. The above method can reduce the planar size of the transistor and increase the storage density of the memory.

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