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    • 2. 发明公开
    • ARRAY SUBSTRATE, METHOD FOR MANUFACTURING ARRAY SUBSTRATE AND DISPLAY DEVICE
    • ARRAYSUBSTRAT,VERFAHREN ZUR HERSTELLUNG EINES ARRAYSUBSTRATS UND ANZEIGEVORRICHTUNG DAMIT
    • EP2991121A1
    • 2016-03-02
    • EP13856064.4
    • 2013-10-31
    • BOE Technology Group Co., Ltd.
    • KIM, HeecheolSONG, YoungsukYOO, SeongyeolCHOI, Seungjin
    • H01L29/786H01L27/12H01L21/77G02F1/1362G02F1/1368
    • H01L27/124G02F1/1362G02F1/136227G02F1/1368G02F2201/40H01L21/283H01L21/32133H01L21/76802H01L23/3171H01L27/1248H01L27/1259H01L27/1288H01L29/1033H01L29/41733H01L29/4175H01L29/66765H01L29/78696H01L2924/0002H01L2924/00
    • An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a plurality of data lines (16), formed on the substrate and extending in a first direction; a plurality of gate lines (15), formed on the substrate (1), crossing the plurality of data lines (15), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines (15) and the plurality of data lines (15) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode (12), wherein, the thin film transistor comprises: a gate electrode (2), connected with one of the plurality of gate lines (15); a gate insulating layer (3), provided above the gate line (15) and the gate electrode (2); an active layer (5), formed on the gate insulating layer (3) and disposed corresponding to the gate electrode (2); a drain electrode (8) and a source electrode (9), disposed opposite to each other above the active layer (5) and having a channel region of the thin film transistor therebetween; a filling layer (4), provided between the gate electrode (2) and the gate line (15) connected with the gate electrode, and the drain and source electrodes (8) and (9); and a passivation layer (10), provided on the source electrode (9), the drain electrode (8) and the active layer (5), wherein at a position directly facing the gate line (15), the passivation layer (10) is provided with a passivation layer through hole (11) configured to perform a connection between the drain electrode (8) and the pixel electrode (12).
    • 提供阵列基板,其制造方法和显示装置,并且阵列基板包括:基板(1); 多个数据线(16),形成在所述基板上并沿第一方向延伸; 形成在所述基板(1)上的与所述多条数据线(15)交叉并沿垂直于所述第一方向的第二方向延伸的多条栅极线(15) 由多个栅极线(15)和多个数据线(15)限定的多个像素区域彼此交叉并以矩阵形式布置,其中每个像素区域设置有薄膜晶体管和 像素电极(12),其中,所述薄膜晶体管包括:栅电极(2),与所述多条栅极线(15)之一连接; 栅极绝缘层(3),设置在栅极线(15)和栅电极(2)之上; 形成在所述栅极绝缘层(3)上并与所述栅电极(2)对应设置的有源层(5); 漏电极(8)和源电极(9),其在有源层(5)上方相对设置并且在其间具有薄膜晶体管的沟道区域; 设置在与栅电极连接的栅电极(2)和栅极线(15)之间的填充层(4)以及漏极和源电极(8)和(9); 以及设置在源电极(9),漏电极(8)和有源层(5)上的钝化层(10),其中在直接面对栅极线(15)的位置处,钝化层(10) 设置有被配置为执行漏电极(8)和像素电极(12)之间的连接的钝化层通孔(11)。