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1. 发明授权

EP1049150B1 Method and structure for bonding layers in a semiconductor device 有权
标题翻译：一种用于在半导体器件层的连接方法和结构
公开(公告)号：EP1049150B1
公开(公告)日：2004-06-23
申请号：EP00303451.9
申请日：2000-04-25
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Cao, Min , Theil, Jeremy A. , Ray, Gary W. , Vook, Dietrich W.
IPC分类号： H01L21/3205
CPC分类号： H01L21/0242 , H01L21/02491 , H01L21/02494 , H01L21/02532 , H01L21/02579 , H01L21/2007

2. 发明授权

EP1195987B1 Improved image sensor reset circuit for reducing image lag 有权
标题翻译：改进的图像传感器复位电路减小Bildnachleuchtens
公开(公告)号：EP1195987B1
公开(公告)日：2004-03-31
申请号：EP01121187.7
申请日：2001-09-04
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Haddad, Homayoon , Borg, Matthew M. , Mentzer, Ray A. , Gibson, Jonathan S. , Kopley, Thomas Edward , Theil, Jeremy A. , Budrys, Audrius J.
IPC分类号： H04N5/217 , H04N3/15
CPC分类号： H04N5/357

3. 发明公开

EP1045450A3 Image sensor array device 有权
标题翻译： Bildsensoranordnung
公开(公告)号：EP1045450A3
公开(公告)日：2002-05-29
申请号：EP00302987.3
申请日：2000-04-07
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Cao, Min , Theil, Jeremy A. , Ray, Gary W. , Vook, Dietrich W.
IPC分类号： H01L27/146
CPC分类号： H01L27/14601 , H01L27/14665
摘要： An image sensor array. The image sensor array includes a substrate [200]. An interconnect structure [210] is formed adjacent to the substrate [200]. An amorphous silicon electrode layer [250] is adjacent to the interconnect structure [210]. The amorphous silicon electrode layer [250] includes electrode ion implantation regions [240]] between pixel electrode regions [230]. The pixel electrode regions [230] define cathodes of an array of image sensors. The electrode ion implantation regions [240] provide physical isolation between the pixel electrode regions [230]. The cathodes are electrically connected to the interconnect structure [210]. An amorphous silicon I-layer [260] is adjacent to the amorphous silicon electrode layer [250]. The amorphous silicon I-layer [260] forms an inner layer of each of the image sensors. A transparent electrode layer [280] is formed adjacent to the image sensors. An inner surface of the transparent electrode layer [280] is electrically connected to anodes of the image sensors and the interconnect structure [210]. The amorphous silicon I-layer [260] can further include I-layer ion implantation regions [320] that provide physical isolation between the inner layers of the image sensors. The I-layer ion implantation regions [320] align with the electrode ion implantation regions [320]. An amorphous silicon P-layer [270] can be formed adjacent to the amorphous silicon I-layer [260]. The amorphous silicon P-layer [270] forms an outer layer of each of the image sensors. The amorphous silicon P-layer [270] can include P-layer ion implantation regions [420] that provide physical isolation between the outer layers of the image sensors.
摘要翻译：图像传感器阵列。图像传感器阵列包括衬底Ä200Ü。互连结构Ä210Ü与基底Ä200Ü相邻形成。非晶硅电极层Ä250Ü与互连结构Ä210Ü相邻。非晶硅电极层Ä250Ü包括像素电极区域Ä230Ü之间的电极离子注入区域Ä240ÜÜ。像素电极区域Ä230Ü定义图像传感器阵列的阴极。电极离子注入区域Ä240Ü提供像素电极区域Ä230Ü之间的物理隔离。阴极电连接到互连结构Ä210Ü。非晶硅I层Ä260Ü与非晶硅电极层Ä250Ü相邻。非晶硅I层Ä260Ü形成每个图像传感器的内层。形成与图像传感器相邻的透明电极层Ä280Ü。透明电极层Ä280Ü的内表面电连接到图像传感器和互连结构Ä210Ü的阳极。非晶硅I层Ä260Ü还可以包括在图像传感器的内层之间提供物理隔离的I层离子注入区域Ä320Ü。 I层离子注入区域Ä320Ü与电极离子注入区域Ä320Ü对准。非晶硅P层可以与非晶硅I层Ä260Ü相邻形成。非晶硅P层Å270u形成每个图像传感器的外层。非晶硅P层可以包括在图像传感器的外层之间提供物理隔离的P层离子注入区域Ä420Ü。

4. 发明授权

EP0996164B1 An elevated pin diode active pixel sensor including a unique interconnection structure 有权
标题翻译：具有增加的pin二极管和一个特殊的连接结构有源图像传感器
公开(公告)号：EP0996164B1
公开(公告)日：2006-06-28
申请号：EP99307737.9
申请日：1999-09-30
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Theil, Jeremy A. , Cao, Min , Vook, Dietrich W. , Perner, Frederick A. , Sun, Xin , Ma, Shawming , Ray, Gary W.
IPC分类号： H01L27/146
CPC分类号： H01L27/14632 , H01L27/14643 , H01L31/02002

5. 发明公开

EP1164206A3 Chemical vapor deposition method for amorphous silicon and resulting film 有权
标题翻译：获得，并且其特征在于用于制备非晶硅膜CVD工艺
公开(公告)号：EP1164206A3
公开(公告)日：2003-11-05
申请号：EP01108183.3
申请日：2001-03-30
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Theil, Jeremy A. , Kooi, Gerrit J. , Varghese, Ronnie P.
IPC分类号： C23C16/24 , C23C16/52 , C23C16/50 , C23C16/44 , H01L21/205
CPC分类号： H01L31/202 , C23C16/24 , C23C16/4401 , C23C16/50 , C23C16/52 , H01L31/03762 , Y02E10/548 , Y02P70/521
摘要： Method of depositing a layer of amorphous silicon film on a substrate at a very fast deposition rate while maintaining superior film quality. A plasma volume in a process chamber is defined. A total flow rate of a mixture of gases introduced into the chamber is also defined. The total flow rate is the sum of the flow rates of the respective gases in the mixture. Next, a process parameter that includes the plasma volume and total flow rate is defined. The process parameter is then maintained in a first predetermined relationship with a predetermined value during the deposition of the amorphous silicon film.

6. 发明公开

EP1195987A3 Improved image sensor reset circuit for reducing image lag 有权
标题翻译：改进的图像传感器复位电路减小Bildnachleuchtens
公开(公告)号：EP1195987A3
公开(公告)日：2002-05-15
申请号：EP01121187.7
申请日：2001-09-04
申请人： Agilent Technologies Inc. (a Delaware Corporation)
发明人： Haddad, Homayoon , Borg, Matthew M. , Mentzer, Ray A. , Gibson, Jonathan S. , Kopley, Thomas Edward , Theil, Jeremy A. , Budrys, Audrius J.
IPC分类号： H04N5/217 , H04N3/15
CPC分类号： H04N5/357
摘要： The present invention is an imaging system that includes sensor logic, an image processor receiving and transmitting data to the sensor logic, a reverse bias controller, and a pixel array having hysteresis or image lag. In the present invention, one embodiment to minimize lag is to eliminate the charge contributed during the scanning period and maintaining an optimum reverse voltage at the photodiode node. These actions minimize the trapping of electrons and holes at the defect sites. The reverse bias condition lowers the charge capture rate at defect sites by pulling the charge to positive and negative terminals immediately after illumination induced electron and hole generation.

7. 发明公开

EP1050907A3 Photosensor structure 审中-公开
标题翻译：光传感器结构
公开(公告)号：EP1050907A3
公开(公告)日：2001-12-19
申请号：EP00303670.4
申请日：2000-05-02
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Theil, Jeremy A.
IPC分类号： H01L27/146 , H01L31/11
CPC分类号： H01L27/14647
摘要： A multiple-photosensor structure. The multiple-photosensor structure includes a substrate [200]. A first photosensor is formed adjacent to the substrate [200]. A first pixel electrode of the first photosensor is electrically connected to the substrate [200]. A first transparent conductive layer [240] is formed adjacent to the first photosensor. The first transparent conductive layer [240] electrically connects a first outer electrode of the first photosensor to the substrate [200]. A second photosensor is adjacent to the first transparent conductive layer [240]. A second pixel electrode of the second photosensor is electrically connected to the substrate through the first transparent conductive layer [240]. A second transparent conductive layer [258] is adjacent to the second photosensor. The second transparent conductive layer [258] electrically connects a second outer electrode of the second photosensor to the substrate [200]. The multiple-photosensor structure can further include a third photosensor formed adjacent to the second transparent conductive layer [258]. A third pixel electrode of the third photosensor is electrically connected to the substrate [200] through the second transparent conductive layer [258]. A third transparent conductive layer [268] is formed adjacent to the third photosensor. The third transparent conductive layer [268] electrically connects a third outer electrode of the third photosensor to the substrate [200].

8. 发明公开

EP1049158A3 Semiconductor interconnect structure 有权
标题翻译：半导体互连结构
公开(公告)号：EP1049158A3
公开(公告)日：2001-10-24
申请号：EP00303069.9
申请日：2000-04-12
申请人： Agilent Technologies, Inc. (a Delaware corporation)
发明人： Cao, Min , Ray, Gary W. , Theil, Jeremy A. , Vook, Dietrich W.
IPC分类号： H01L21/768 , H01L23/522 , H01L31/105
CPC分类号： H01L31/1055 , H01L21/76804 , H01L21/76807 , H01L21/7684 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor interconnect structure (1) having a polished surface (15) for directly communicating an electrically conductive layer (3) to a semiconductor layer (17). A dielectric layer (5) is formed on the electrically conductive layer. A dual-inlaid cavity (20) is formed by etching a via cavity (7) and a contact cavity (8) into the dielectric layer. A damascene contact (9) is formed by depositing tungsten into the dual-inlaid cavity. Chemical-mechanical polishing is used to planarize and smooth a surface of the damascene contact until the surface is coplanar with the dielectric layer. A semiconductor layer is then deposited on the damascene contact. The semiconductor layer can be the node of an amorphous silicon P-I-N photodiode (22). Electrical interconnection between the node of the photodiode and the electrically conductive layer is accomplished without using an intermediate electrode, and the smooth damascene contact improves surface adhesion, reduces contact resistance, and provides a discrete connection to the semiconductor layer. The damascene contact may be polished to provide a light reflective surface finish for reflecting light incident on the damascene contact back into the semiconductor layer to improve the quantum efficiency of the P-I-N photodiode.

9. 发明公开

EP1052698A3 Interlayer dielectric for integrated circuit 审中-公开
标题翻译：用于集成电路层间介电层
公开(公告)号：EP1052698A3
公开(公告)日：2001-08-29
申请号：EP00303822.1
申请日：2000-05-08
申请人： Agilent Technologies Inc. a Delaware Corporation
发明人： Theil, Jeremy A. , Perner, Frederick A. , Ray, Gary W. , Cao, Min
IPC分类号： H01L27/146
CPC分类号： H01L27/14601 , H01L31/02005
摘要： An integrated circuit sensor structure. The integrated circuit sensor structure includes a substrate [200] which includes electronic circuitry. An interconnect structure [210] is adjacent to the substrate [200]. The interconnect structure [210] includes conductive interconnect vias [214, 216, 218] which pass through the interconnect structure [210]. A dielectric layer [220] is adjacent to the interconnect structrure [210]. The dielectric layer [220] includes a planar surface [228], and conductive vias [222, 224, 226] which pass through the dielectric layer [220] and are electrically connected to the interconnect vias [214, 216, 218]. The dielectric layer [220] further includes an interlayer planarization dielectric layer [230] adjacent to the interconnect structure [210], and a passivating layer [240] adjacent to the interlayer planarization dielectric layer [230]. The integrated circuit sensor structure further includes sensors adjacent to the dielectric layer [220]. The interconnect vias [214, 216, 218] and the vias [222, 224, 226] electrically connect the electronic circuitry to the sensors.

10. 发明公开

EP1122790A2 A conductive mesh bias connection for an array of elevated active pixel sensors 有权
标题翻译： Eine elektrischleitendemaschenförmigeSpannungsanschlussstellefüreine Matrix vonerhörteraktiver Bildsensoren
公开(公告)号：EP1122790A2
公开(公告)日：2001-08-08
申请号：EP00122087.0
申请日：2000-10-11
申请人： Agilent Technologies Inc. a Delaware Corporation
发明人： Theil, Jeremy A. , Mei-Jech Lin, Jane , Cao, Min , Ray, Gary W. , Ma, Shawming , Sun, Xin
IPC分类号： H01L27/146 , H01L31/0224
CPC分类号： H01L27/14665 , H01L27/14601 , H01L31/022408
摘要： An array of active pixel sensors. The array of active pixel sensors includes a substrate (200). An interconnect structure (210) is formed adjacent to the substrate. The interconnect structure (210) includes a plurality of conductive vias (212, 214, 216, 218). A plurality of photo sensors are formed adjacent to the interconnect structure (210). Each photo sensor includes a pixel electrode (222, 224, 226). Each pixel electrode (222, 224, 226) is electrically connected to the substrate (200) through a corresponding conductive via (214, 216, 218). An I-layer (220) is formed over each of the pixel electrodes. The array of active pixel sensors further includes a conductive mesh (240) formed adjacent to the photo sensors. An inner surface of the conductive mesh (240) is electrically and physically connected to the photo sensors, and electrically connected to the substrate through a conductive via (212). The conductive mesh (240) providing light shielding between photo sensors thereby reducing cross-talk between the photo sensors. The conductive mesh (240) includes apertures that align with at least one of the pixel electrodes of the photo sensors.
摘要翻译：一组有源像素传感器。有源像素传感器的阵列包括衬底（200）。互连结构（210）邻近于衬底形成。互连结构（210）包括多个导电通孔（212,214,216,218）。在互连结构（210）附近形成多个光传感器。每个光传感器包括像素电极（222,224,226）。每个像素电极（222,224,226）通过相应的导电通孔（214,216,218）与衬底（200）电连接。在每个像素电极上形成I层（220）。有源像素传感器的阵列还包括邻近光传感器形成的导电网（240）。导电网（240）的内表面电学上和物理上连接到光传感器，并通过导电通孔（212）电连接至基片。导电网（240）在光传感器之间提供光屏蔽，从而减少光传感器之间的串扰。导电网（240）包括与光传感器的至少一个像素电极对准的孔。

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