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1. 发明公开

EP1747592A1 NON-VOLATILE TRANSISTOR MEMORY ARRAY INCORPORATING READ-ONLY ELEMENTS WITH SINGLE MASK SET 审中-公开
标题翻译：只有READ不挥发晶体管存储矩阵使用单MASK KIT
公开(公告)号：EP1747592A1
公开(公告)日：2007-01-31
申请号：EP05724590.4
申请日：2005-03-03
申请人： ATMEL CORPORATION
发明人： WEINER, Albert, S.
IPC分类号： H01L31/119 , H01L31/108
CPC分类号： H01L27/112 , H01L27/0207 , H01L27/105 , H01L27/11286 , H01L27/115 , H01L27/11517 , H01L27/11526
摘要： A memory array has memory elements of identical topology or footprint arranged in rows and columns. Some of the memory elements are EEPROM cells (Figs. 1 and 2) and other memory elements are read only memory cells (Figs. 3-6) but all are made using a mask set having the same length and width dimensions. In the mask set for EEPROMs, a principal mask is used for formation of a depletion implant (23, 37). In the case of one type of read-only memory element (Figs. 3 and 4), this mask is mainly blocked, leading to formation of a transistor (51) with a non-conductive channel between source (25) and drain (55). In the case of another read only memory element (Figs. 5 and 6), the same mask is unblocked, leading to formation of a transistor (61) with a highly conductive or almost shorted channel (65) between source and drain. These two read only memory elements are designated as logic one and logic zero. By having rows of read-only memory elements with rows of EEPROMs on the same chip, a more versatile memory array chip may be built without sacrificing chip space.

2. 发明公开

EP1661248A2 SELF-LIMITING PULSE WIDTH MODULATION REGULATOR 审中-公开
标题翻译：自限制脉宽调制调节器
公开(公告)号：EP1661248A2
公开(公告)日：2006-05-31
申请号：EP04780512.2
申请日：2004-08-10
申请人： ATMEL CORPORATION
发明人： WEINER, Albert, S.
IPC分类号： H03K3/16
CPC分类号： H03K3/017 , H03K3/0231 , H03K5/082 , H03K7/08
摘要： A self-adjusting PWM regulator which minimizes undershoot and overshoot conditions is disclosed. The regulator includes a charge pump, a voltage comparator circuit, and a latch circuit. The input of the voltage comparator circuit includes an output of the charge pump. The input of the latch circuit includes an output from the voltage comparator circuit. The latch circuit includes a pair of SR latches coupled to a pair of AND/OR gates. The latch circuit transmits a first signal to the charge pump to prevent an overshoot condition if the output from the voltage comparator circuit is in a first state, and transmits a second signal to prevent an undershoot condition if the ouput from the voltage comparator circuit is in a second state. This keeps the charge pump adjusted within the limits of its control.
摘要翻译：公开了一种自调节PWM调节器，其使下冲和过冲条件最小化。该稳压器包括一个电荷泵，一个电压比较器电路和一个锁存电路。电压比较器电路的输入包括电荷泵的输出。锁存电路的输入包括来自电压比较器电路的输出。锁存电路包括耦合到一对“与”/“或”门的一对SR锁存器。如果来自电压比较器电路的输出处于第一状态，则闩锁电路向电荷泵发送第一信号以防止过冲状况，并且如果来自电压比较器电路的输入处于输入状态则发送第二信号以防止下冲状态第二个状态。这将电荷泵调整到其控制范围内。

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