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1. 发明公开

EP1554750A2 USING SCATTEROMETRY TO OPTIMIZE CIRCUIT STRUCTURE MANUFACTURING PROCESSES 审中-公开
标题翻译：使用测量方法优化电路结构制造过程
公开(公告)号：EP1554750A2
公开(公告)日：2005-07-20
申请号：EP03776412.3
申请日：2003-10-14
申请人： ADVANCED MICRO DEVICES INC.
发明人： CHOO, Bryan, K. , SINGH, Bhanwar , SUBRAMANIAN, Ramkumar , RANGARAJAN, Bharath
IPC分类号： H01L21/66
CPC分类号： H01L22/20 , G01N21/4738 , H01L2924/0002 , H01L2924/00
摘要： A system and methodology are disclosed for monitoring and controlling a semiconductor fabrication process. Measurements are taken in accordance with scatterometry based techniques of repeating in circuit structures that evolve on a wafer as the wafer undergoes the fabrication process. The measurements can be employed to generate feed forward and/or feedback control data that can utilized to selectively adjust one or more fabrication components and/or operating parameters associated therewith to adapt the fabrication process. Additionally, the measurements can be employed in determining whether to discard the wafer or portions thereof based on a cost benefit analysis, for example. Directly measuring in circuit structures mitigates sacrificing valuable chip real estate as test grating structures may not need to be formed within the wafer, and also facilitates control over the elements that actually affect resulting chip performance.
摘要翻译：公开了一种用于监视和控制半导体制造工艺的系统和方法。根据基于散射测量的技术进行测量，在晶片经历制造过程时在晶片上演变的电路结构中重复进行。该测量结果可用于生成前馈和/或反馈控制数据，该数据可用于选择性地调整一个或多个制造部件和/或与其相关的操作参数以适应制造过程。另外，例如，可以基于成本效益分析来采用测量来确定是否丢弃晶圆或其部分。电路结构中的直接测量减少了牺牲有价值的芯片面积，因为可能不需要在晶片内形成测试光栅结构，并且还便于控制实际影响所得芯片性能的元件。

2. 发明授权

EP1279072B1 OZONE-ENHANCED SILYLATION PROCESS TO INCREASE ETCH RESISTANCE OF ULTRA THIN RESISTS 有权
标题翻译： OZONE钢筋甲硅烷基化，以增加薄的耐蚀刻性抗蚀剂层的
公开(公告)号：EP1279072B1
公开(公告)日：2004-10-06
申请号：EP01927263.2
申请日：2001-04-19
申请人： ADVANCED MICRO DEVICES INC.
发明人： RANGARAJAN, Bharath , SUBRAMANIAN, Ramkumar , PHAN, Khoi, A. , SINGH, Bhanwar , TEMPLETON, Michael, K. , YEDUR, Sanjay, K. , CHOO, Bryan, K.
IPC分类号： G03F7/40 , G03F7/26
CPC分类号： G03F7/265 , H01L21/0273 , H01L21/31144 , H01L21/32139
摘要： In one embodiment, the present invention relates to a method of processing an ultra-thin resist (16), involving the steps of depositing the ultra-thin resist (16) over a semiconductor substrate (12), the ultra-thin resist (16) having a thickness less than about 3,000 ANGSTROM ; irradiating the ultra-thin resist (16) with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist (16); and contacting the ultra-thin resist (16) with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted between irradiating and developing the utra-thin resist (16) or after developing the ultra-thin resist (16).

3. 发明公开

EP1402242A2 USING SCATTEROMETRY TO DEVELOP REAL TIME ETCH IMAGE 有权
标题翻译： LENS测的使用图实时蚀刻
公开(公告)号：EP1402242A2
公开(公告)日：2004-03-31
申请号：EP02707668.6
申请日：2002-01-31
申请人： ADVANCED MICRO DEVICES INC.
发明人： SUBRAMANIAN, Ramkumar , RANGARAJAN, Bharath , SINGH, Bhanwar , TEMPLETON, Michael, K.
IPC分类号： G01N21/47 , H01L21/66
CPC分类号： H01L21/7681 , G01N21/4738 , H01J37/32935 , H01L21/67069 , H01L21/67253 , H01L22/12
摘要： A system (1000) for characterizing an etch process, such as forming a dual damascene structure, via scatterometry based real time imaging is provided. The system (1000) includes one or more light sources (1020), each light source directing light to one or more features and/or gratings (1015) on a wafer (1010). Light reflected from the features and/or gratings (1015) is collected by a measuring system (1070), which processes the collected light. The collected light is indicative of the etch results achieved at respective portions of the wafer (1010). The measuring system (1070) provides etching related data to a processor (1040) that determines the desirability of the etching of the respective portions of the wafer (1010). The system (1000) also includes one or more etching devices (1030), each such device corresponding to a portion of the wafer (1010) and providing for the etching thereof. The processor (1040) produces a real time etch image to characterize the progress of the etching and, in one example, produces suggested adaptations to the etch process.

4. 发明公开

EP1279072A2 UV-ENHANCED SILYLATION PROCESS TO INCREASE ETCH RESISTANCE OF ULTRA THIN RESISTS 有权
标题翻译： UV增强甲硅烷基化，以增加薄的耐蚀刻性抗蚀剂层的
公开(公告)号：EP1279072A2
公开(公告)日：2003-01-29
申请号：EP01927263.2
申请日：2001-04-19
申请人： ADVANCED MICRO DEVICES INC.
发明人： RANGARAJAN, Bharath , SUBRAMANIAN, Ramkumar , PHAN, Khoi, A. , SINGH, Bhanwar , TEMPLETON, Michael, K. , YEDUR, Sanjay, K. , CHOO, Bryan, K.
IPC分类号： G03F7/40 , G03F7/26
CPC分类号： G03F7/265 , H01L21/0273 , H01L21/31144 , H01L21/32139
摘要： In one embodiment, the present invention relates to a method of processing an ultra-thin resist (16), involving the steps of depositing the ultra-thin resist (16) over a semiconductor substrate (12), the ultra-thin resist (16) having a thickness less than about 3,000Å; irradiating the ultra-thin resist (16) with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist (16); and contacting the ultra-thin resist (16) with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted between irradiating and developing the utra-thin resist (16) or after developing the ultra-thin resist (16).

5. 发明公开

EP1277226A1 SYSTEM AND METHOD FOR ILLUMINATING A SEMICONDUCTOR PROCESSING SYSTEM 审中-公开
标题翻译：用于照亮半导体处理系统的系统和方法
公开(公告)号：EP1277226A1
公开(公告)日：2003-01-22
申请号：EP01920732.3
申请日：2001-03-22
申请人： ADVANCED MICRO DEVICES INC.
发明人： RANGARAJAN, Bharath , SINGH, Bhanwar , PHAN, Khoi, A. , CHOO, Bryan, K. , SUBRAMANIAN, Ramkumar
IPC分类号： H01L21/00
CPC分类号： H01L21/67005
摘要： The present invention relates to illuminating an interior portion of a processing chamber (120, 220) in a semiconductor processing system (102). A fiber optic light source (110, 210) is operatively associated with the processing chamber (120, 220) to illuminate the interior of the processing chamber (120, 220) to facilitate viewing the interior of the processing chamber (120, 220).
摘要翻译：本发明涉及照射半导体处理系统（102）中的处理室（120,220）的内部部分。光纤光源（110,210）与处理室（120,220）可操作地关联以照亮处理室（120,220）的内部以便于观察处理室（120,220）的内部。

6. 发明公开

EP1312109A1 SUPER CRITICAL DRYING OF LOW K MATERIALS 审中-公开
标题翻译：超临界干燥的低介电常数材料
公开(公告)号：EP1312109A1
公开(公告)日：2003-05-21
申请号：EP01941963.9
申请日：2001-06-04
申请人： ADVANCED MICRO DEVICES INC.
发明人： RANGARAJAN, Bharath , SUBRAMANIAN, Ramkumar , SINGH, Bhanwar
IPC分类号： H01L21/316 , H01L21/768
CPC分类号： H01L21/0212 , H01L21/02203 , H01L21/02282 , H01L21/02343 , H01L21/31695
摘要： One aspect of the present invention relates to a method of forming a low k material layer on a semiconductor substrate, involving the steps of depositing a mixture containing a low k material and a casting solvent on the semiconductor substrate; optionally contacting the mixture with a transition solvent whereby the casting solvent is removed from the mixture to form a second mixture containing the low k material and the transition solvent; contacting the second mixture with a supercritical fluid whereby the transition solvent is removed from the second mixture; and permitting the supercritical fluid to evaporate thereby forming the low k material layer.

7. 发明公开

EP1277225A1 SYSTEM AND METHOD FOR ILLUMINATING A SEMICONDUCTOR PROCESSING SYSTEM 审中-公开
标题翻译：方法和装置用于照明的半导体器件处理
公开(公告)号：EP1277225A1
公开(公告)日：2003-01-22
申请号：EP01916697.4
申请日：2001-03-15
申请人： ADVANCED MICRO DEVICES INC.
发明人： SINGH, Bhanwar , RANGARAJAN, Bharath , PHAN, Khoi, A. , CHOO, Bryan, K. , SUBRAMANIAN, Ramkumar
IPC分类号： H01L21/00
CPC分类号： H01L21/6719 , H01L21/67253
摘要： The present invention relates to illuminating an interior portion of a processing chamber (120, 220) in a semiconductor processing system (102). A light emitting diode (110, 210) is located in the processing chamber (120, 220) to illuminate the interior of the chamber to facilitate viewing the interior of the processing chamber (120, 220).

8. 发明授权

EP1264340B1 USE OF ORGANIC SPIN ON MATERIALS AS A STOP-LAYER FOR LOCAL INTERCONNECT, CONTACT AND VIA LAYERS 有权
标题翻译：有机旋涂材料作为用于本地连接结构限制层，并通过KONTAKT接触层使用
公开(公告)号：EP1264340B1
公开(公告)日：2006-12-13
申请号：EP01922242.1
申请日：2001-02-21
申请人： ADVANCED MICRO DEVICES, INC.
发明人： SUBRAMANIAN, Ramkumar , YANG, Wenge
IPC分类号： H01L21/768 , H01L21/311
CPC分类号： H01L21/76895 , H01L21/02118 , H01L21/0212 , H01L21/3127 , H01L21/76802 , H01L21/76834
摘要： The present invention relates to a methodology of fabricating a local interconnect. The methodology includes the steps of forming an organic stop layer over a semiconductor structure having at least one conductive region, forming an insulating layer over the organic layer, forming a photoresist layer over the insulating layer, patterning the photoresist layer with at least one opening above the at least one conductive region, etching at least one opening in the insulating layer, concurrently stripping the photoresist layer and an exposed portion of the organic layer and filling the at least one opening with a conductive material to form the local interconnect.

9. 发明授权

EP1282839B1 USE OF RTA FURNACE FOR PHOTORESIST BAKING 有权
标题翻译： KURZZEITTEMPEROFEN的相片用保护膜烧伤
公开(公告)号：EP1282839B1
公开(公告)日：2004-06-23
申请号：EP01924657.8
申请日：2001-04-03
申请人： ADVANCED MICRO DEVICES INC.
发明人： SUBRAMANIAN, Ramkumar , RANGARAJAN, Bharath , TEMPLETON, Michael, K. , SINGH, Bhanwar
IPC分类号： G03F7/38
CPC分类号： G03F7/38
摘要： In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate (23) having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace (21); heating the substrate (23) having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate (23) having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace (21) within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system (20) of processing a photoresist, containing a source of actinic radiation and a mask of selectively irradiating a photoresist; a rapid thermal annealing furnace (21) for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.

10. 发明公开

EP1373828A1 METHOD TO MEASURE FEATURES WITH ASYMMETRICAL PROFILE 有权
标题翻译：法测量与不对称的轮廓特征作者：
公开(公告)号：EP1373828A1
公开(公告)日：2004-01-02
申请号：EP01995896.6
申请日：2001-11-13
申请人： ADVANCED MICRO DEVICES INC.
发明人： SINGH, Bhanwar , TEMPLETON, Michael, K. , RANGARAJAN, Bharath , SUBRAMANIAN, Ramkumar
IPC分类号： G01B11/30 , G01B11/24 , G01B11/26 , H01L21/26
CPC分类号： G01B11/30 , G01B11/24 , G01B11/26 , G01N21/211 , G01N21/4738 , G01N21/9501
摘要： The present invention is directed to a method (58) for detecting asymmetry in the profile of a feature (82) formed on a wafer during the process of semiconductor fabrication. The method (58) encompasses directing a beam of light or radiation at a feature (66) and detecting a reflected beam associated therewith (68). Data associated with the reflected beam is correlated with data associated with known feature profile s(19) to ascertain profile characteristics associated with the feature of interest (192). Using the profile characteristics, an asymmetry of the feature is determined (192) which is then used to generate feedback or feedforward process control data (200) to compensate for or correct such asymmetry in subsequent processing.

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