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1. 发明公开

EP1417590A2 PROGRAMMABLE LOGIC INTEGRATED CIRCUIT DEVICES INCLUDING DEDICATED PROCESSOR COMPONENTS 审中-公开
标题翻译：提供特定的处理器组件可编程逻辑集成电路
公开(公告)号：EP1417590A2
公开(公告)日：2004-05-12
申请号：EP01987904.8
申请日：2001-10-02
申请人： Altera Corporation (a Delaware Corporation)
发明人： LANGHAMMER,Martin
IPC分类号： G06F15/78
CPC分类号： G06F15/7867
摘要： A programmable logic integrated circuit device ('PLD') includes programmable logic and a dedicated (i.e., at least partly hard-wired) processor object (or at least a high-functionality functional unit) for performing or at least helping to perform tasks that it is unduly inefficient to implement in the more general-purpose programmable logic and/or that, if implemented in the programmable logic, would operate unacceptably or at least undesirably slowly. The processor object includes an operating portion and a program sequencer that retrieves or at least helps to retrieve instructions for controlling or at least partly controlling the operating portion. The processor object may also include an address generator and/or a multi-ported register file for generating or at least helping to generate addresses of data on which the operating portion is to operate and/or destinations of data output by the operating portions. Examples of typical operating portions include multiplier-accumulators, arithmetic logic units, barrel shifters, and DSP circuitry of these or other kinds. The PLD may be provided with the capability to allow programs to be written for the device using local or 'relative' addresses, and to automatically convert theses addresses to actual or 'absolute' addresses when the programs are actually performed by the device.

2. 发明授权

EP0746102B1 Programmable logic array integrated circuit 失效
标题翻译：具有可编程逻辑阵列的集成电路
公开(公告)号：EP0746102B1
公开(公告)日：2001-12-12
申请号：EP96112928.5
申请日：1993-04-07
申请人： Altera Corporation (a Delaware Corporation)
发明人： Cliff, Richard G. , Lytle, Craig Schilling , Ahanin, Bahram , Heile, Francis B. , Pedersen, Bruce B. , Veenstra, Kerry
IPC分类号： H03K19/177
CPC分类号： H03K19/17736 , H03K19/17704 , H03K19/17728 , H03K19/1774 , H03K19/17792

3. 发明授权

EP0767422B1 Look up table implementation of fast carry for adders and counters 失效
标题翻译：查找加法器和计数器快速进位的表执行情况
公开(公告)号：EP0767422B1
公开(公告)日：2000-03-01
申请号：EP96118347.2
申请日：1993-04-07
申请人： Altera Corporation (a Delaware Corporation)
发明人： Cliff, Richard G. , Cope, L. Todd , Veenstra, Kerry , Pederson, Bruce B.
IPC分类号： G06F7/50 , G06F1/035 , H03K19/177 , H03K21/00 , G06F7/48
CPC分类号： G06F7/501 , G06F1/0356 , G06F7/575 , H03K19/17704 , H03K19/17728 , H03K21/00

4. 发明授权

EP0746103B1 Programmable logic array integrated circuits 失效
标题翻译：用可编程逻辑阵列集成电路
公开(公告)号：EP0746103B1
公开(公告)日：2000-01-19
申请号：EP96112929.3
申请日：1993-04-07
申请人： Altera Corporation (a Delaware Corporation)
发明人： Cliff, Richard G. , Lytle, Craig Schilling , Ahanin, Bahram , Heile, Francis B. , Pedersen, Bruce B. , Veenstra, Kerry
IPC分类号： H03K19/177
CPC分类号： H03K19/17736 , H03K19/17704 , H03K19/17728 , H03K19/1774 , H03K19/17792

5. 发明公开

EP1612940A3 Application-specific integrated circuit equivalents of programmable logic and associated methods 审中-公开
标题翻译：专用集成电路等效于可编程逻辑电路和相关联的方法
公开(公告)号：EP1612940A3
公开(公告)日：2007-08-22
申请号：EP05253922.8
申请日：2005-06-24
申请人： Altera Corporation (a Delaware Corporation)
发明人： Chua, Kar Keng, c/o Blk P-2-04 , Cheung, Sammy , Phoon, Hee Kong , Tan, Kim Pin , Goay, Wei Lian
IPC分类号： H03K19/00
CPC分类号： H03K19/177 , H03K19/1737
摘要： Providing ASIC equivalents of FPGAs is facilitated and made more efficient and economical by using an ASIC architecture including a plurality of so-called hybrid logic elements ("HLEs"), each of which can provide a portion of the full functionality of an FPGA logic element ("LE"). The functionality of each FPGA LE implementing a user's logic design can be mapped to one or more HLEs without re-synthesis of the user's logic. Only as many HLEs as are necessary are used to perform the functions of each LE. The one-for-one equivalence between each LE and either (1) one HLE or (2) a group of HLEs facilitates mapping (without re-synthesis) in either direction between FPGA and ASIC designs.

6. 发明公开

EP1248372A2 Programmable logic device with high speed serial interface circuitry 有权
标题翻译： Programmierbare Logikschaltung mit einer seriellen Hochgeschwindigkeitsschnittstelle
公开(公告)号：EP1248372A2
公开(公告)日：2002-10-09
申请号：EP02251891.4
申请日：2002-03-15
申请人： Altera Corporation (a Delaware Corporation)
发明人： Lee, Chong II , Asayesh, Reza
IPC分类号： H03K19/177
CPC分类号： H03K19/17744 , H03K19/17732
摘要： A programmable logic device ("PLD") includes high speed serial interface ("HSSI") circuitry that can support several high speed serial ("HSS") standards. Examples of the standards that can be supported are XAUI, InfiniBand, 1G Ethernet, FibreChannel, and Serial RapidIO. The HSSI circuitry may be partly programmable to support these various standards. In some cases control may come from the associated PLD core circuitry. Also in some cases some of the interface functions may be performed in the PLD core circuitry.
摘要翻译：可编程逻辑器件（“PLD”）包括可支持若干高速串行（“HSS”）标准的高速串行接口（“HSSI”）电路。可支持的标准的例子有XAUI，InfiniBand，1G以太网，FibreChannel和Serial RapidIO。 HSSI电路可以部分地可编程以支持这些各种标准。在某些情况下，控制可能来自相关的PLD核心电路。同样在某些情况下，一些接口功能可以在PLD核心电路中执行。

7. 发明公开

EP1215586A2 Configuring memory and registers from a serial device 审中-公开
标题翻译：通过串行设备的存储器和寄存器配置
公开(公告)号：EP1215586A2
公开(公告)日：2002-06-19
申请号：EP01305053.9
申请日：2001-06-11
申请人： Altera Corporation (a Delaware Corporation)
发明人： May, Roger , Draper, Andrew
IPC分类号： G06F15/78 , G06F9/445
CPC分类号： G06F13/405
摘要： A method and apparatus for configuring a digital system having a programmable logic device and embedded logic from a configuration source that supplies a single serialized configuration bit stream for configuring both the programmable logic device and the embedded logic.
摘要翻译：一种用于配置具有从配置源的可编程逻辑器件和嵌入式逻辑做了数字系统的方法和装置，用于配置这两个可编程逻辑器件和所述嵌入式逻辑提供一个单一的串行配置比特流。

8. 发明授权

EP0786871B1 Programmable logic array integrated circuits 失效
标题翻译：可编程的，集成逻辑装置
公开(公告)号：EP0786871B1
公开(公告)日：2001-12-19
申请号：EP97106242.7
申请日：1992-08-06
申请人： Altera Corporation (a Delaware Corporation)
发明人： Pederson, Bruce B. , Cliff, Richard G. , Ahanin, Bahram , Lytle, Craig Schilling , Heile, Francis B. , Veenstra, Kerry Scott
IPC分类号： H03K19/173 , H03K19/177
CPC分类号： H03K19/1737 , H03K19/17704 , H03K19/17728 , H03K19/17736

9. 发明公开

EP1143452A2 Memory circuitry for programmable logic integrated circuit devices 有权
标题翻译： Speicherschaltungfüreine programmierbare logische integrierte Schaltungsanordnung
公开(公告)号：EP1143452A2
公开(公告)日：2001-10-10
申请号：EP01302220.7
申请日：2001-03-12
申请人： Altera Corporation (a Delaware Corporation)
发明人： Ngai, Tony , Prasad, Nitin , Tran, Thungoc
IPC分类号： G11C8/16 , G11C8/00
CPC分类号： H03K19/1776 , G11C7/1075 , G11C8/16 , G11C11/005
摘要： A programmable logic device includes, in addition to the usual regions of programmable logic and the programmable interconnect, at least one region of memory which has multiple independently usable write and/or read ports (e.g., two write ports and two read ports). Every memory cell in the memory region is accessible from any of these ports. This enables the memory region to be used to provide either one relatively large memory or two somewhat smaller memories, each occupying a fraction of the full memory. In the latter case, the two memories provided can have any of many different sizes relative to one another. Many different modes or combinations of modes of operating the memory region or parts of the memory region are possible.
摘要翻译：可编程逻辑器件除了通常的可编程逻辑区域和可编程互连之外还包括具有多个可独立使用的写入和/或读出端口（例如，两个写入端口和两个读取端口）的至少一个存储器区域。存储器区域中的每个存储单元都可以从任何这些端口访问。这使得存储区域能够用于提供一个相对较大的存储器或两个稍小的存储器，每个存储器占据完整存储器的一小部分。在后一种情况下，提供的两个存储器可以具有相对于彼此的许多不同大小的任何一个。操作存储器区域或存储器区域的部分的模式的许多不同模式或组合是可能的。

10. 发明授权

EP0767423B1 Look up table implementation of fast carry for adders and counters 失效
标题翻译：高速生成携带用于加法器和计数器以查找表的帮助下
公开(公告)号：EP0767423B1
公开(公告)日：2000-03-01
申请号：EP96118348.0
申请日：1993-04-07
申请人： Altera Corporation (a Delaware Corporation)
发明人： Cliff, Richard G. , Cope, L. Todd , Veenstra, Kerry , Pederson, Bruce B.
IPC分类号： G06F7/50 , G06F1/035 , H03K19/177 , H03K21/00 , G06F7/48
CPC分类号： G06F7/501 , G06F1/0356 , G06F7/575 , H03K19/17704 , H03K19/17728 , H03K21/00

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