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    • 5. 发明公开
    • DIRECTION INPUT DEVICE AND CONTROLLER
    • EP4369156A1
    • 2024-05-15
    • EP21953510.1
    • 2021-08-13
    • Nintendo Co., Ltd.
    • FURUIKE, Hironori
    • G06F3/0338
    • G06F3/0338
    • A direction input device includes an input portion, a first slide portion, a second slide portion, a first slid surface, a second slid surface, and a slide biasing portion. The input portion includes an operated portion and a shaft. The first slide portion slides in a first direction. The first slide portion is provided with a first hole through which the shaft passes, the first hole extending in a second direction. The second slide portion slides in the second direction. The second slide portion is provided with a second hole through which the shaft passes, the second hole extending in the first direction. The first slid surface extends in the first direction and is in a shape curved convexly upward. The first slide portion slides over the first slid surface as the first slide portion abuts thereon from below. The second slid surface extends in the second direction and is in a shape curved convexly upward. The second slide portion slides over the second slid surface as the second slide portion abuts thereon from below. The slide biasing portion is provided below the first slide portion and the second slide portion to bias the first slide portion upward from below as pressing the first slide portion against the first slid surface and to bias the second slide portion upward from below as pressing the second slide portion against the second slid surface.
    • 10. 发明公开
    • COMPUTING METHOD AND APPARATUS, CHIP, ELECTRONIC DEVICE, AND STORAGE MEDIUM
    • EP4216051A3
    • 2023-11-15
    • EP23173374.2
    • 2023-05-15
    • KunlunXin Technology (Beijing) Company Limited
    • WU, PengOUYANG, Jian
    • G06F7/483G06F7/544
    • The present disclosure provides an computing method, apparatus, and a storage medium, and relates to the technical field of computers, and in particular, to the technical field of chips and artificial intelligence. An implementation is: based on a plurality of first floating point numbers of a first vector and a plurality of second floating point numbers of a second vector that are input to a computing apparatus obtaining a plurality of first fixed point numbers and a plurality of first exponents that correspond to the plurality of first floating point numbers, and a plurality of second fixed point numbers and a plurality of second exponents that correspond to the plurality of second floating point numbers; obtaining a fixed point product and a fixed point product exponent corresponding to the fixed point product of each first fixed point number of the plurality of first fixed point numbers and a second fixed point number corresponding to the first fixed point number; obtaining a fixed point inner product calculation result of the first vector and the second vector based on a fixed point product exponent corresponding to each of a plurality of fixed point products; and obtaining, based on the fixed point inner product calculation result, a floating point inner product calculation result in a floating point data format corresponding to the fixed point inner product calculation result.