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61. 发明公开

EP0007578A1 Schaltungsanordnung zur Aussendung von Telegrafiezeichen 失效
标题翻译： Schaltungsanordnung zur Aussendung von Telegrafiezeichen。
公开(公告)号：EP0007578A1
公开(公告)日：1980-02-06
申请号：EP79102539.8
申请日：1979-07-18
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： Hötzel, Oskar , Skobranek, Norbert
IPC分类号： H04L25/08 , H04L25/12 , H04L25/22
CPC分类号： H04L25/027 , H04L25/0274 , H04L25/028 , H04L25/12
摘要： Die Erfindung bezieht sich auf eine Schaltungsanordnung zur Aussendung von Telegrafiezeichen. Dabei soll eine Telegrafie-Sendeschaltung angegeben werden, bei der die Reichweite höchstens in sehr geringem Umfange durch die automatische Regelung des Leitungsstromes eingeengt wird und bei der zur Abflachung der Telegrafiezeichen ohne große Induktivitäten ausgekommen wird. Zu diesem Zweck ist ein einziger Operationsverstärker mit vorgeschaltetem RC-Netzwerk sowohl zur Einstellung des Leitungsstromes als auch zur Zeichenabflachung vorgesehen. Die Hauptanwendung der Erfindung liegt in einer Fernschreib-Sendeschaltung. (Fig. 1)
摘要翻译： 1.一种用于经由线路（L）发送直流电报信号的电路装置，其中所述发射电路（S）包含与所述输入（E）电隔离的平衡电路，用于调平所述电信号和电路，用于通过应用于一个输入（2）的运算放大器（OP1）来自动调节线电流（IL），理论值可在平衡电路中调节，实际值由线电流（IL）和测量值电阻器（RM1，RM2）施加到其他输出端（1），并且其中运算放大器（OP1）和调平电路（R5，R6，R7，C1，C2，C3）的电路元件形成有源滤波器，在电流分离的电路装置（OK）和平衡电路之间设置用于发送数据（SD）的差分电路（C4，C9）和其一个输入（3）为连接到不同（并且其另一输入端（4）被耦合回（Rk，R8）到线路（L）的发送输出端（a）。

62. 发明授权

EP2798742B1 FORWARDED CLOCK JITTER REDUCTION 有权
公开(公告)号：EP2798742B1
公开(公告)日：2018-09-05
申请号：EP11878713.4
申请日：2011-12-30
申请人： Intel Corporation
发明人： ROYTMAN, Eduard, Edi , NAGARAJAN, Mahalingam, Mali , VEMPADA, Pradeep, R.
IPC分类号： H03K19/0175 , H04L25/02 , H03F3/45
CPC分类号： H03K5/1565 , H03F3/45071 , H03F2200/144 , H03F2200/165 , H03F2200/375 , H03F2200/78 , H03K5/26 , H04L25/0274 , H04L25/0296 , H04L25/03878
摘要： In some embodiments, a differential amplifier with duty cycle correction is provided.

63. 发明授权

EP2715937B1 BALANCED IMPEDANCE METHOD FOR DIFFERENTIAL SIGNALING 有权
标题翻译：差分信号的平衡阻抗法
公开(公告)号：EP2715937B1
公开(公告)日：2018-02-21
申请号：EP12794005.4
申请日：2012-05-25
申请人： Analog Devices, Inc.
发明人： SAYUK, Mark , KAPUSTA, Ronald
IPC分类号： H03H7/38
CPC分类号： H03H7/38 , H04L25/0274 , H04L25/0276
摘要： A system and method for implementing a differential signaling driver with a common-mode voltage not equal to one half the power supply voltage using voltage-mode techniques. Embodiments of the present invention maintain balanced impedance at the signal output. In an embodiment, a driver may have multiple operating modes for each potential supply voltage or common-mode voltage. In an embodiment, each potential mode may involve configuring the driver by activating or deactivating switches or resistors in the driver and each potential mode may have different resistor values.

64. 发明公开

EP3130105A1 BROADBAND POWER COUPLING/DECOUPLING NETWORK FOR PoDL 有权转让
标题翻译： BREITBANDLEISTUNGSKOPPLUNGS - / - ENTKOPPLUNGSNETZWERKFÜRPODL
公开(公告)号：EP3130105A1
公开(公告)日：2017-02-15
申请号：EP15719055.4
申请日：2015-04-09
申请人： Linear Technology Corporation
发明人： GARDNER, Andrew J.
IPC分类号： H04L12/10 , H02H9/00 , H04L12/40 , H04L25/02 , G06F13/40
CPC分类号： H04L25/0274 , G06F13/4072 , H02H9/008 , H04L12/10 , H04L12/40045 , H04L25/0266
摘要： A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (32) supplying DC power and Ethernet data over a single twisted wire pair (14) to a Powered Device (PD). The PSE (32) supplies the DC current (34) and AC data through a cascaded coupling network (30) including a series of AC-blocking inductor stages (L1-L4, CL1-4) having different inductances to substantially filter out the AC component and pass the DC component (34). The data is supplied to the wires via capacitors (C1, C2). The PD may have a matched decoupling network for providing the separated DC power and data to a PD load.
摘要翻译：数据线上电（PoDL）系统包括通过单个双绞线将DC电源和以太网数据提供给有源设备（PD）的电源设备（PSE）。 PSE通过级联耦合网络提供直流电流和交流数据，包括具有不同电感的一系列交流阻塞电感级，以实质上过滤出交流分量并通过直流分量。数据通过电容器提供给导线。 PD可以具有匹配的去耦网络，用于将分离的DC功率和数据提供给PD负载。

65. 发明授权

EP2875702B1 DIGITAL COMMUNICATION INTERFACE CIRCUIT FOR LINE-PAIR WITH DUTY CYCLE IMBALANCE COMPENSATION 有权转让
标题翻译：接口电路数字通信与占空比不平衡补偿铅PAIR
公开(公告)号：EP2875702B1
公开(公告)日：2016-09-14
申请号：EP13767100.4
申请日：2013-07-17
申请人： Philips Lighting Holding B.V.
发明人： REZEANU, Stefan-Cristian
IPC分类号： H05B37/02 , H04L25/02
CPC分类号： H05B37/0254 , H04L25/0266 , H04L25/0274

66. 发明公开

EP3018830A1 Differential wired communication link quality detector and differential wired communication link quality detection method 有权转让
标题翻译：分散式抽屉式装置机器人组件和分类器系列产品系列产品系列产品系列产品系列
公开(公告)号：EP3018830A1
公开(公告)日：2016-05-11
申请号：EP14191802.9
申请日：2014-11-05
申请人： European Space Agency
发明人： JANSEN, Richard , ILLSTAD, Jorgen
IPC分类号： H04B3/46 , G01R31/02 , H04L1/24 , H04L25/02 , H03K5/19 , H04B3/30
CPC分类号： H04L1/20 , G01R31/02 , H03K5/19 , H04B3/30 , H04B3/46 , H04L1/24 , H04L25/0272 , H04L25/0274 , H04L25/08 , H04L25/085
摘要： The present invention relates to detecting link failure in a receiver for receiving differential voltage signals, said link failure including any or all of a single short failure, double short failure, single open failure, and double open failure. The invention proposes a method of determining link failure in a receiver for receiving a differential voltage signal via a first signal line and a second signal line, the method comprising: obtaining a first quantity depending on the larger one of a maximum value over time of a voltage level that is attained in the first signal line and a maximum value over time of a voltage level that is attained in the second signal line; obtaining a second quantity depending on a maximum value over time of an average of an instantaneous voltage level in the first signal line and an instantaneous voltage level in the second signal line; and determining that the link failure has occurred on the basis of the first quantity and the second quantity. The present invention further proposes a corresponding apparatus for determining link failure.
摘要翻译：本发明涉及检测用于接收差分电压信号的接收机中的链路故障，所述链路故障包括单个短路故障，双重故障，单次故障和双重故障中的任何一个或全部。本发明提出了一种确定接收机中的链路故障的方法，用于经由第一信号线和第二信号线接收差分电压信号，所述方法包括：根据随时间的最大值获得第一数量，在第一信号线中获得的电压电平和在第二信号线中获得的电压电平的时间上的最大值; 根据所述第一信号线中的瞬时电压电平的平均值和所述第二信号线中的瞬时电压电平的随时间的最大值获得第二数量; 以及基于所述第一数量和所述第二数量确定所述链路故障已经发生。本发明还提出了一种用于确定链路故障的相应装置。

67. 发明公开

EP2761834A1 AN APPARATUS TO IMPLEMENT SYMMETRIC SINGLE-ENDED TERMINATION IN DIFFERENTIAL VOLTAGE-MODE DRIVERS 有权转让
标题翻译： DEVICE实施平衡的单端部终端以不同的电压模式驱动程序
公开(公告)号：EP2761834A1
公开(公告)日：2014-08-06
申请号：EP12794567.3
申请日：2012-09-30
申请人： Qualcomm Innovation Center, Inc.
发明人： ZHONG, Cheng , DANG, Vannam , LI, Miao , MAAROUF, Fares K. , SOWLATI, Tirdad
IPC分类号： H04L25/02 , H03K19/0185
CPC分类号： H04L25/0274 , H04L25/0278
摘要： A differential voltage mode driver for implementing symmetric single ended termination includes an output driver circuitry having a predefined termination impedance. The differential voltage mode driver also includes an output driver replica having independently controlled first and second portions. The first and second portions are independently controlled to establish a substantially equal on-resistance of the first and the second portions. The output driver replica controls the predefined termination impedance of the output driver circuitry.

68. 发明公开

EP2621137A3 Integrated combiner with common mode correction 有权
标题翻译：具有共模校正的集成组合器
公开(公告)号：EP2621137A3
公开(公告)日：2013-09-25
申请号：EP13152919.0
申请日：2013-01-28
申请人： Tektronix, Inc.
发明人： Bertrand, Keith
IPC分类号： H04L25/02
CPC分类号： H04L25/0274 , H04L25/0276
摘要： A circuit can include multiple data input ports and data output ports, pickoff tees coupled therebetween, and a resistive network coupled between the pickoff tees. A differential signal generator can be coupled with the resistive network and the pickoff tees. Resistances of the pickoff tees and resistive network can be selected such that impedances looking into the data input ports and data output ports are matched to a desired system impedance.
摘要翻译：电路可以包括多个数据输入端口和数据输出端口，耦合在其间的拾取T形接头以及耦合在拾取T形接头之间的电阻网络。差分信号发生器可以与电阻网络和传感器三通耦合。拾取三通和电阻网络的电阻可以选择为使得看着数据输入端口和数据输出端口的阻抗与期望的系统阻抗相匹配。

69. 发明公开

EP2475110A1 DIFFERENTIAL RECEPTION SYSTEM IN A CELLULAR RECEIVER AND METHOD FOR REALIZING SIGNAL RECEPTION THEREOF 有权
标题翻译：移动无线电接收器增量备份的系统和方法对于其接待
公开(公告)号：EP2475110A1
公开(公告)日：2012-07-11
申请号：EP09848895.0
申请日：2009-12-23
申请人： ZTE Corporation
发明人： HE, Wenqing
IPC分类号： H04B7/26
CPC分类号： H04L25/0274 , H04B1/18 , H04L27/22 , H04L2027/0026 , H04L2027/0053 , H04L2027/0067
摘要： This disclosure provides a differential reception system in a cellular receiver and a method for realizing signal reception thereof, including: filtering a received signal and then transforming the filtered signal into differential signals; and performing amplification and phase discrimination process of differential signals and compensating the phase of either channel differential signal, and synthesizing the processed differential signals and demodulating the synthesized signal. By means of controlling the phases of differential lines, the disclosure improves the receiving sensitivity of a differential reception system and significantly reduces the requirement for layout of the differential lines.
摘要翻译：本发明提供一种在蜂窝接收器和用于实现信号接收体，包括的方法的差分接收系统：过滤所接收的信号，然后将滤波信号转换成差分信号; 和执行差分信号的放大和相位鉴别处理和补偿无论信道的差分信号的相位，并合成处理的差分信号并解调合成信号。通过控制差分线的相位的手段，本发明改善了差分接收系统的接收灵敏度并显着降低对差分线的布局的要求。

70. 发明公开

EP1699135A3 Low amplitude differential output circuit and serial transmission interface using the same 审中-公开
标题翻译：输出电路具有小差分幅度和接口，用于串行传输
公开(公告)号：EP1699135A3
公开(公告)日：2008-07-09
申请号：EP06003948.4
申请日：2006-02-27
申请人： NEC Electronics Corporation
发明人： Watarai, Seiichi NEC Electronics Corp.
IPC分类号： H03K19/00
CPC分类号： H03K19/00323 , H03K5/003 , H03K5/151 , H04L25/0274 , H04L25/028
摘要： A low amplitude differential output circuit includes a pre-buffer circuit (1,1') configured to output a main buffer drive signal of a first drive signal and a second drive signal which are complimentary signals, as a differential signal; and a main buffer circuit (2, 2') connected with the pre-buffer circuit to output a differential output signal in response to the main buffer drive signal. Each of the first drive signal and the second drive signal has an amplitude between a first voltage and a second voltage, and the first drive signal and the second drive signal take a same voltage between the first voltage and a middle voltage between the first voltage and the second voltage.

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