专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明公开

EP1531590A1 Method and apparatus for channel equalisation with estimation of the channel impulse response length 审中-公开
标题翻译：使用信道脉冲响应的长度的估计方法和装置，用于信道均衡
公开(公告)号：EP1531590A1
公开(公告)日：2005-05-18
申请号：EP03078544.8
申请日：2003-11-11
申请人： STMicroelectronics Belgium N.V.
发明人： Wernaers, Yves
IPC分类号： H04L25/02 , H04L25/03
CPC分类号： H04L25/0216 , H04L25/022 , H04L25/0224 , H04L25/024 , H04L25/03292 , H04L2025/03414 , H04L2025/03585
摘要： An aspect of the present invention is the use of two criteria in channel estimation, e.g. a value related to the length of an estimated Channel Impulse Response ( CIR ) and a value related to a noise content of the received signal, e.g. a Signal-to-Noise Ratio ( SNR ). These parameters can be used for the post-processing algorithm. An advantage of the present invention is that it is much more robust against long channels and/or high noise contents in received signals. Additionally it has moderate implementation complexity.
摘要翻译：本发明的一个方面是在信道估计中使用的两个标准，E.G. 相关的估计信道脉冲响应（CIR）的长度的值和与所接收的信号的噪声内容的值，例如一个信噪比（SNR）。这些参数可用于后处理算法。本发明的一个优点是没有它是对长信道和/或高的噪声内容在接收到的信号更健壮。此外，它具有适度的实现复杂度。

52. 发明公开

EP1422826A1 Exact self-calibration of a pll with multiphase clocks 有权
标题翻译： Genaue Selbstkalibrierung einer einen mehrphasigen Takt erzeugenden Phasenregelschleife
公开(公告)号：EP1422826A1
公开(公告)日：2004-05-26
申请号：EP02447227.6
申请日：2002-11-21
申请人： STMicroelectronics Belgium N.V.
发明人： Craninckx, Jan Frans Lucien
IPC分类号： H03L7/18 , H03L7/099 , H03L7/089
CPC分类号： H03L7/0996 , H03L7/081 , H03L7/0891 , H03L7/18
摘要： The present invention is related to a Phase-Locked Loop with multiphase clocks with

a first loop (Main loop) comprising, coupled in cascade, a Phase Frequency Detector (PFD) (1), a Main Charge Pump (2), a Main Loop Filter (3), a Multi-Phase Voltage Controlled Oscillator (VCO) (4) and a Phase-switching Fractional Divider (5), and
a second loop (for Calibration) comprising the series connection of a Multiplexer (6) and Y Calibration Loop Filters (7), with Y being an integer, coupled between said Phase Frequency Detector (PFD) (1) and said Multi-Phase Voltage Controlled Oscillator (VCO) (4), said Multiplexer (6) being controlled by a Control Logic (8) coupled to said Phase-Switching Fractional Divider (5), and a Reference Frequency Signal (9) being applied to said Phase Frequency Detector (PFD) (1),
characterised in that said Multiplexer (6) has an input connected to an output of said Main Charge Pump (2), and has outputs connected to inputs of said Main Loop Filter (3) and of said Y Calibration Loop Filters (7),
and in that a Calibration signal (11) is applied at a control input of said Control Logic (8).
摘要翻译：本发明涉及具有多相时钟的锁相环，具有第一回路（主回路），其包括级联耦合的相位检波器（PFD）（1），主电荷泵（2），主回路滤波器（3），多相电压控制振荡器（VCO）（4）和相位切换分数分频器（5），以及第二回路（用于校准），包括多路复用器（6）和Y校准环路滤波器（7），其中Y是整数，耦合在所述相位频率检测器（PFD）（1）和所述多相压控振荡器（VCO）（4）之间，所述多路复用器（6）由控制逻辑（8）耦合到所述相位切换分数分频器（5），以及参考频率信号（9），其被施加到所述相位频率检测器（PFD）（1），其特征在于，所述多路复用器（6）具有连接到所述主电荷泵（2）的输出，并且具有连接到所述主回路滤波器（3）和所述Y卡利（7），并且在所述控制逻辑（8）的控制输入处施加校准信号（11）。

53. 发明授权

EP1638210B1 VLIF transmitter for a "Bluetooth Wireless Technology" device 有权
标题翻译： VLIF发射的“蓝牙无线技术”设备
公开(公告)号：EP1638210B1
公开(公告)日：2009-05-06
申请号：EP04077551.2
申请日：2004-09-15
申请人： STMicroelectronics Belgium N.V.
发明人： Borremans, Marc , Goetschalckx, Paul , Monterastelli, Andrea
IPC分类号： H04B1/04 , H03D7/16 , H03C3/40
CPC分类号： H03J1/005 , H04B2001/0491

54. 发明公开

EP1968218A1 Multi-channel transmitter 有权转让
标题翻译：多通道发射器
公开(公告)号：EP1968218A1
公开(公告)日：2008-09-10
申请号：EP07004752.7
申请日：2007-03-08
申请人： STMicroelectronics Belgium N.V.
发明人： Borremans, Marc
IPC分类号： H04H1/00
CPC分类号： H04H60/80 , H04H20/22 , H04H20/26 , H04H20/62 , H04H2201/13
摘要： A radio transmission method and a radio transmitter device for radio transmission of an audio signal from an audio device to a radio receiver is described, wherein an audio signal is received from the audio device; and an RF signal is transmitted simultaneously which is modulated with the audio signal on each of a set of at least two different RF channels. Within each of the transmitted RF signals, information identifying at least the other RF channels in the set of RF channels is included.

55. 发明公开

EP1610273A1 Improved security device and terminal and method for communication between them 审中-公开
标题翻译： Verbesserte Sicherheitsvorrichtung und Terminal und Verfahren zur Kommunikation zwischen ihnen
公开(公告)号：EP1610273A1
公开(公告)日：2005-12-28
申请号：EP04447151.4
申请日：2004-06-25
申请人： STMicroelectronics Belgium N.V.
发明人： Fontaine, Paul
IPC分类号： G07F7/10 , G10L17/00
CPC分类号： G07F7/1008 , G06Q20/341 , G06Q20/40145 , G07C9/00087 , G10L17/00
摘要： The present invention is related to a device arranged for authorising the use of a selected function among at least two functions provided on the device. The device comprises storing means (1) for a function-specific voice pattern linked to the selected function and comparing means (2) arranged for comparing an external input signal with the function-specific voice pattern.
摘要翻译：本发明涉及一种设备，用于在设备上提供的至少两个功能中授权使用所选择的功能。该装置包括用于与所选择的功能相链接的功能特定语音模式的存储装置（1）和用于将外部输入信号与功能特定语音模式进行比较的比较装置（2）。

56. 发明公开

EP1545083A1 Apparatus and method with reduced complexity for per tone equalization in a multicarrier system 有权
标题翻译：设备和方法，在多载波系统中用于均衡降低Complexität针对每个载波
公开(公告)号：EP1545083A1
公开(公告)日：2005-06-22
申请号：EP03079137.0
申请日：2003-12-19
申请人： STMicroelectronics Belgium N.V.
发明人： Pisoni, Fabio
IPC分类号： H04L27/26 , H04L25/03 , G06F17/14
CPC分类号： H04L27/2647 , H04L25/03159 , H04L2025/03414
摘要： An equalizer for a multi carrier signal for carrying out equalization adapted to each carrier or group of carriers, Fourier transforms the multi carrier signal, and obtains difference terms of the multi carrier signal. Both are input to an adaptive filter, to output equalized signals, wherein decimation is applied to at least some of the difference terms input to the filter. This is notable for enabling the complexity to be reduced for a given performance level. In particular since only non-zero filter taps need to be stored and updated, coefficient memory and coefficient calculation capacity can be reduced. Another way to reduce complexity involves measuring noise for at least some of the carriers, and dynamically adapting the size of the filter on a per carrier basis according to global optimizion euristic algorithms which adapt this filter size based on the comparison between this noise and an optimal performance figure achieved in a previous ISI-ICI free measurement phase.
摘要翻译：用于进行均衡angepasst到载波的每个载波或一组用于多载波信号的均衡器，傅立叶变换的多载波信号，并且获得多载波信号的差异方面。既被输入到在自适应滤波器，来输出均衡的信号，抽取worin被施加到的至少一些输入到滤波器的差术语。这是值得注意的使降低复杂性对于一个给定的性能水平。特别是因为仅非零滤波器抽头需要被存储和更新，系数存储器和系数计算容量可被减小。降低复杂性的另一种方法涉及到测量噪声对于至少一些所述载波，并动态地适应滤波器的大小以每个载波为基础雅丁全球optimizion euristic算法基于该噪声和最佳地之间的比较这个滤波器的尺寸相适应性能数据在之前的ISI ICI免费测量阶段实现。

57. 发明公开

EP1545006A1 Local oscillator for harmonic image-rejection mixers 审中-公开
标题翻译： Lokaloszillatorfüreinen harmonischen Mischer mitUnterdrückungder Spiegelfrequenz
公开(公告)号：EP1545006A1
公开(公告)日：2005-06-22
申请号：EP03447297.7
申请日：2003-12-19
申请人： Interuniversitair Microelektronica Centrum vzw ( IMEC) , STMicroelectronics Belgium N.V.
发明人： Craninckx, Jan Frans Lucien
IPC分类号： H03L7/081 , H03D3/00 , H03B27/00
CPC分类号： H03B27/00 , H03D7/18 , H03L7/07 , H03L7/0812 , H03L7/087 , H03L7/16
摘要： The present invention is related to a device for generating signals spaced π/X rad apart (X being an integer) comprising

at least one delay cell (15) with a delay approximately corresponding to a phase shift π/X rad, and
at least one phase detection system (16) inputting at least two signals (10) delayed by the delay cell(s) (15) and generating a feedback signal (18) to at least one delay cell (15).
摘要翻译：本发明涉及一种用于产生间隔π/ X辐射（X为整数）的信号的装置，该信号包括至少一个延迟单元（15），延迟单元（15）的延迟大致对应于相移pi / Xrad，以及至少一个相位检测系统（16）输入由延迟单元（15）延迟的至少两个信号（10），并向至少一个延迟单元（15）产生反馈信号（18）。

58. 发明公开

EP1434352A1 Delay-compensated fractional-N frequency synthesizer 有权
$Delay-compensated fractional-N frequency synthesizer$
标题翻译：频繁合成器
公开(公告)号：EP1434352A1
公开(公告)日：2004-06-30
申请号：EP02447268.0
申请日：2002-12-23
申请人： STMicroelectronics Belgium N.V.
发明人： Craninckx, Jan Frans Lucien
IPC分类号： H03L7/18 , H03L7/081 , H03L7/089
CPC分类号： H03L7/081 , H03L7/0893 , H03L7/1976
摘要： The present invention is related to a Phase-Locked Loop with

a main loop comprising a Phase Frequency Detector (1), a Main Charge Pump (2), a Main Loop Filter (3), a Voltage Controlled Oscillator (4) and a Frequency Divider (5), coupled in series,
a calibration loop coupled to said Phase Frequency Detector (1) and comprising a Calibration Charge Pump (6) and a Calibration Loop Filter (8'),
a Control Logic (9) arranged to control said Frequency Divider (5) and to receive a control input signal, and
a Reference Frequency Signal (10) applied to said Phase Frequency Detector (PFD)(1) and to said Control Logic (9) and a calibration signal (11) applied to said calibration loop,
wherein the main loop comprises a delay generator (14) controlled by said Control Logic (9) and arranged to receive correction signals from said calibration loop and to send an output signal to said Phase Frequency Detector (1).
摘要翻译：本发明涉及一种具有主回路的锁相环，该主回路包括相位检波器（1），主电荷泵（2），主回路滤波器（3），压控振荡器（4）和频率分频器（5），串联耦合的校准环路，耦合到所述相位检波器（1）并且包括校准电荷泵（6）和校准环路滤波器（8'），控制逻辑（9）分频器（5）并且接收控制输入信号，以及施加到所述相位频率检测器（PFD）（1）和所述控制逻辑（9）的参考频率信号（10）和施加到所述校准环路，其中所述主回路包括由所述控制逻辑（9）控制并被布置成从所述校准回路接收校正信号并向所述相位检波器（1）发送输出信号的延迟发生器（14）。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式