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41. 发明公开

EP2946364A1 RENDERING GRAPHICS DATA USING VISIBILITY INFORMATION 有权
标题翻译：呈现图形数据使用VISIBILITÄTSINFORMATIONEN的
公开(公告)号：EP2946364A1
公开(公告)日：2015-11-25
申请号：EP13826910.5
申请日：2013-12-20
申请人： Qualcomm Incorporated
发明人： SEETHARAMAIAH, Avinash , BALCI, Murat , FRASCATI, Christopher Paul , GRUBER, Andrew Evan
IPC分类号： G06T15/00
CPC分类号： G06T11/40 , G06T15/005
摘要： In some examples, aspects of this disclosure relate to a method for rendering an image. For example, the method includes generating visibility information indicating visible primitives of the image. The method also includes rendering the image using a binning configuration, wherein the binning configuration is based on the visibility information.

42. 发明公开

EP4248412A1 METHODS AND APPARATUS FOR SELECTION OF RENDERING MODES 审中-实审
公开(公告)号：EP4248412A1
公开(公告)日：2023-09-27
申请号：EP20961926.1
申请日：2020-11-19
申请人： Qualcomm Incorporated
发明人： DU, Bo , GRUBER, Andrew Evan , XU, Yongjun
IPC分类号： G06T15/04 , G06T15/06 , G06T11/40

43. 发明公开

EP4222713A1 APPARATUS AND METHOD FOR GRAPHICS PROCESSING UNIT HYBRID RENDERING 审中-实审
公开(公告)号：EP4222713A1
公开(公告)日：2023-08-09
申请号：EP21789899.8
申请日：2021-08-31
申请人： QUALCOMM INCORPORATED
发明人： ALLA, Srihari Babu , NAGENDRA KUMAR, Jonnala Gadda , SEETHARAMAIAH, Avinash , GRUBER, Andrew Evan , HAMMERSTONE, Richard , FRISINGER, Thomas Edwin , ARCHARD, Daniel
IPC分类号： G06T15/00 , G06T1/60 , G06T1/20 , A63F13/52

44. 发明公开

EP4204956A1 DEFERRED GPR ALLOCATION FOR TEXTURE/LOAD INSTRUCTION BLOCK 审中-实审
公开(公告)号：EP4204956A1
公开(公告)日：2023-07-05
申请号：EP21758984.5
申请日：2021-08-04
申请人： QUALCOMM INCORPORATED
发明人： DU, Yun , WEI, Fei , ZHONG, Gang , HUANG, Minjie , JIANG, Jian , YING, Zilin , YANG, Baoguang , XIA, Yang , HAN, Jing , HU, Liangxiao , ZHANG, Chihong , YU, Chun , GRUBER, Andrew Evan , DEMERS, Eric
IPC分类号： G06F9/30 , G06F8/41 , G06F9/38 , G06F9/50 , G06F12/00 , G06T1/20

45. 发明授权

EP3161817B1 LOAD SCHEME FOR SHARED REGISTER IN GPU 有权
公开(公告)号：EP3161817B1
公开(公告)日：2020-02-19
申请号：EP15739043.6
申请日：2015-06-11
申请人： Qualcomm Incorporated
发明人： DU, Yun , GRUBER, Andrew Evan , CHEN, Lin , JIAO, Guofang , YU, Chun
IPC分类号： G09G5/36 , G06T1/60

46. 发明授权

EP3350766B1 STORING BANDWIDTH-COMPRESSED GRAPHICS DATA 有权
公开(公告)号：EP3350766B1
公开(公告)日：2019-11-06
申请号：EP16753760.4
申请日：2016-08-01
申请人： Qualcomm Incorporated
发明人： GRUBER, Andrew Evan , HILL, Rexford Alan , KHANDELWAL, Shambhoo
IPC分类号： G06T1/20 , G06T1/60 , G06F12/02 , G06T11/40

47. 发明公开

EP3449467A1 CONSTANT MULTIPLICATION WITH TEXTURE UNIT OF GRAPHICS PROCESSING UNIT 审中-公开
公开(公告)号：EP3449467A1
公开(公告)日：2019-03-06
申请号：EP17712384.1
申请日：2017-03-09
申请人： Qualcomm Incorporated
发明人： GRUBER, Andrew Evan , CHEN, Lin , LI, Liang , MEI, Chunhui
IPC分类号： G06T15/00 , G06T15/04

48. 发明公开

EP3417369A1 UNIFORM PREDICATES IN SHADERS FOR GRAPHICS PROCESSING UNITS 有权
公开(公告)号：EP3417369A1
公开(公告)日：2018-12-26
申请号：EP17701772.0
申请日：2017-01-09
申请人： Qualcomm Incorporated
发明人： GRUBER, Andrew Evan , ARGADE, Pramod Vasant , WU, Jing
IPC分类号： G06F9/30 , G06F9/38
摘要： A method for processing data in a graphics processing unit including receiving an indication that all threads of a warp in a graphics processing unit (GPU) are to execute a same branch in a first set of instructions, storing one or more predicate bits in a memory as a single set of predicate bits, wherein the single set of predicate bits applies to all of the threads in the warp, and executing a portion of the first set of instructions in accordance with the single set of predicate bits. Executing the first set of instructions may include executing the first set of instruction in accordance with the single set of predicate bits using a single instruction, multiple data (SIMD) processing core and/or executing the first set of instruction in accordance with the single set of predicate bits using a scalar processing unit.

49. 发明授权

EP3061070B1 SELECTIVELY MERGING PARTIALLY-COVERED TILES TO PERFORM HIERARCHICAL Z-CULLING 有权
标题翻译：选择性地将部分覆盖的瓷砖合并为分层Z-CULLING
公开(公告)号：EP3061070B1
公开(公告)日：2017-12-20
申请号：EP14789461.2
申请日：2014-10-08
申请人： Qualcomm Incorporated
发明人： WANG, Tao , GRUBER, Andrew Evan , KHANDELWAL, Shambhoo
IPC分类号： G06T15/00 , G06T15/40
CPC分类号： G06T15/405 , G06T1/60 , G06T15/005

50. 发明公开

EP3230880A1 PROCESSING UNALIGNED BLOCK TRANSFER OPERATIONS 审中-公开
标题翻译：处理未对齐的块传输操作
公开(公告)号：EP3230880A1
公开(公告)日：2017-10-18
申请号：EP15797535.0
申请日：2015-11-06
申请人： Qualcomm Incorporated
发明人： GRUBER, Andrew Evan
IPC分类号： G06F13/28
CPC分类号： G06T1/60 , G06F13/28 , G06T1/20 , G06T2200/28 , Y02D10/14
摘要： This disclosure describes techniques for processing unaligned block transfer (BLT) commands. The techniques of this disclosure may involve converting an unaligned BLT command into multiple aligned BLT commands, where the multiple aligned BLT commands may collectively produce the same resulting memory state as that which would have been produced by the unaligned BLT command. The techniques of this disclosure may allow the benefits of relatively low-power GPU-accelerated BLT processing may be achieved for unaligned BLT commands without requiring a CPU to pre-process and/or post-process the underlying unaligned surfaces. In this way, the performance and/or power consumption associated with processing unaligned BLT commands in an alignment-constrained GPU-based system may be improved.
摘要翻译：本公开描述了用于处理未对齐块传输（BLT）命令的技术。本公开的技术可涉及将未对齐的BLT命令转换为多个对齐的BLT命令，其中多个对齐的BLT命令可共同产生与未对齐的BLT命令已产生的存储器状态相同的结果存储器状态。本公开的技术可以允许相对低功率的GPU加速的BLT处理的益处可以针对未对齐的BLT命令实现，而不需要CPU预处理和/或后处理下面的未对齐的表面。以这种方式，可以改进与在对齐受限的基于GPU的系统中处理未对齐的BLT命令相关联的性能和/或功耗。

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