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21. 发明公开

EP0223463A3 MULTIPROCESSOR DATA PROCESSING SYSTEM 失效
标题翻译：多处理器数据处理系统
公开(公告)号：EP0223463A3
公开(公告)日：1988-09-07
申请号：EP86308468
申请日：1986-10-30
申请人： DATA GENERAL CORPORATION
发明人： KERNS, DANIEL R. , PILAT, JOHN F. , GILGIS, JOHN R. , KIRKPATRICK, DANA A.
IPC分类号： G06F15/16 , G06F9/30 , G06F9/46 , G06F9/48 , G06F9/50 , G06F15/167 , G06F15/177
CPC分类号： G06F9/4837 , G06F9/30043 , G06F9/30076 , G06F9/3009 , G06F9/3851 , G06F9/463

22. 发明授权

EP0137526B1 Arithmetic unit in data processing system with exponent overflow/underflow detection 失效
标题翻译：数据处理系统中的算术单元，具有溢出/下流检测
公开(公告)号：EP0137526B1
公开(公告)日：1988-08-10
申请号：EP84200991.2
申请日：1982-04-23
申请人： DATA GENERAL CORPORATION
发明人： Rosen, Josh , Blau, Jonathan S.
IPC分类号： G06F7/48
CPC分类号： G06F7/5272 , G06F7/483 , G06F7/4873 , G06F7/4991 , G06F7/49947 , G06F7/49994 , G06F7/535 , G06F2207/3896 , G06F2207/5352

23. 发明公开

EP0132157A3 Data processing system having dual processors 失效
标题翻译：具有双处理器的数据处理系统
公开(公告)号：EP0132157A3
公开(公告)日：1987-11-25
申请号：EP84304903
申请日：1984-07-18
申请人： DATA GENERAL CORPORATION
发明人： Wade, Donald A. , Wagner, Eric M. , Krantz, Lawrence W. , Goodman, R.W.
IPC分类号： G06F15/16
CPC分类号： G06F13/18 , G06F13/362 , G06F15/17
摘要： The data processing system comprises a host processor (101) and an attached processor (106). Each processor is capable of executing user programs under a different operating system and each processor is capable of accessing a system memory (103) but the host processor controls and performs all input and output operations for both processors. The system memory (103) is shared by the processors; therefore only one processor is active on the bus system at any given time. Control logic is disclosed for holding the host processor (101) and starting the attached processor (106) upon a command from the host and for holding the attached processor and starting the host in the event of interrupt conditions, attempted access by the attached processor to protected areas of memory, or execution of an "out" instruction by the attached processor. Memory mapping logic (102) is under host control, but provides mapping for both the host and attached processors.

24. 发明公开

EP0223557A2 Display control in a data processing system 失效
标题翻译：在einem Datenverarbeitungssystem中的Anzeigesteuerung。
公开(公告)号：EP0223557A2
公开(公告)日：1987-05-27
申请号：EP86308825.8
申请日：1986-11-12
申请人： DATA GENERAL CORPORATION
发明人： O'Brien,Walter A. , Rich,David L. , Hurd,Charles C. , Pogue,Michael
IPC分类号： G09G1/00
CPC分类号： G09G5/14
摘要： In a distributed computer system, each CPU (101) accesses memory via an intelligent memory control unit (401) connected by a memory bus (404) to a local memory (102) and video memory (113) and by an interface bus to other memory control units (401) In the system. A video control unit (406) relieves the CPU (101) of much of the detailed work of modifying bit maps in the video memory (113). More specifically, in order to enhance the ability of the system to manage displays, especially in a technical graphics environment, where a single physical display supports a plurality of logical displays (windows), machine-language (graphics) instructions are provided which, in conjunction with logical display descriptors (forms) that describe each window, enable management and generation of display image data to be performed directly by the processing hardware of the digital computer system, minimizing the need for intervening software. Mechanisms are provided which gives the hardware the ability to defer complex protection and creation policies (faults) to operating system software. Data computed from the logical display descriptors may be encached, greatly enhancing the speed of consecutive operations on windows. Graceful creation is enhanced by permitting prosessing control to escape (trap) to software emulation handlers.
摘要翻译：在分布式计算机系统中，每个CPU（101）经由由存储器总线（404）连接到本地存储器（102）和视频存储器（113）的智能存储器控制单元（401）访问存储器，并且通过接口总线访问其他存储器控制单元（401）在系统中。视频控制单元（406）可以缓解CPU（101）在视频存储器（113）中修改位图的详细工作的大部分。更具体地，为了提高系统管理显示器的能力，特别是在单个物理显示器支持多个逻辑显示器（窗口）的技术图形环境中，提供了机器语言（图形）指令，其在结合描述每个窗口的逻辑显示描述符（表单），使得能够直接由数字计算机系统的处理硬件执行显示图像数据的管理和生成，从而最小化对中间软件的需求。提供了机制，使硬件能够将复杂的保护和创建策略（故障）推迟到操作系统软件。从逻辑显示描述符计算的数据可能被加密，大大提高了Windows上连续操作的速度。通过允许开发控制来逃避（陷阱）到软件仿真处理程序来增强优雅的创建。

25. 发明授权

EP0069517B1 Character display apparatus 失效
标题翻译：字符显示设备
公开(公告)号：EP0069517B1
公开(公告)日：1987-05-06
申请号：EP82303342.8
申请日：1982-06-25
申请人： DATA GENERAL CORPORATION
发明人： Hunt, Glenn E. , Lozano, Gerald L. , Alexander, Michael C. , Manktelow, Gerald O.
IPC分类号： G09G1/16
CPC分类号： G09G5/26

26. 发明公开

EP0125922A3 Apparatus for detecting regularly occurring signal sequence in a data stream 失效
标题翻译：用于检测数据流中正常发生的信号序列的装置
公开(公告)号：EP0125922A3
公开(公告)日：1987-04-01
申请号：EP84303269
申请日：1984-05-15
申请人： DATA GENERAL CORPORATION
发明人： Gershenson, Edward , Lemone, Louis A. , Lippitt, Mark C.
IPC分类号： G11B05/09 , G11B05/012 , G06F03/06
CPC分类号： G11B20/1426 , G11B5/012 , G11B20/12 , G11B27/3027 , G11B2220/20
摘要： A SYNC Detected signal (1035) is normally provided by resetting a flip-flop (1237) when a synchronization code in a header or data preamble of a disc sector is detected by logic (1223). Flip-flop (1237) is initially forced set by a signal (1229 or 1231) indicating a header or data preamble should be present. Detection of the code pulls SYNC DET (1225) low to reset the flip-flop (1237) and thereby force SYNC Detected high. If the code is not detected when it should have been, a signal SET SYNC (651) is forced low to reset another flip-flop (1251) which puts SYNCW(12191) low and putsSYNC Detected (1035) high via an inverter (1221). Accordingly data will always be read from a header preamble but the header will not be read correctly and will not match the target header. Data will therefore not be read from or written to the sector.

27. 发明公开

EP0212016A1 A system of graphical manipulation in a potentially windowed data display 失效
标题翻译：系统，用于在与显示窗口能力的显示装置的图形操作。
公开(公告)号：EP0212016A1
公开(公告)日：1987-03-04
申请号：EP85305716.4
申请日：1985-08-12
申请人： DATA GENERAL CORPORATION
发明人： Pilat, John , Keating, David , Colella, Wayne
IPC分类号： G09G1/00 , G09G1/16
CPC分类号： G09G5/14 , G09G2360/121
摘要： A method is disclosed which enhances the ability of a digital computer system to manage displays, especially in an environment where a single physical display supports a plurality of logical displays (windows). Machine-language instructions are provided to a CPU (201) from user software and data (208. 217). These instructions act in conjunction with user-supplied form descriptors (209) describing each of the windows to enable management and generation of display image data to be performed directly by the processing hardware of the digital computer system, eliminating any need for intervening interpretive software. The display image data is placed in a screen bitmap memory (215) or a reserve memory (214) for occluded image data. Data computed from form descriptors may be held in a cache (206) in order to enhance the speed of consecutive operations on windows. Graceful creation is enhanced by permitting processing control to escape to software fault handlers (211).
摘要翻译：一种方法是游离缺失盘这增强一个数字计算机系统来管理显示的能力，尤其是爱在其中单个物理显示支持逻辑显示器（视窗）的多个A环境。机器语言指令被提供给从用户软件和数据（208 217）的CPU（201）。这些指令动作与用户提供的形式描述符（209）描述每个窗口以使得能够由数字计算机系统的处理硬件直接执行的显示图像数据的管理和产生的同时，消除了任何需要插入的解释性软件。的显示图像数据在画面的位图存储器（215）或用于遮挡图像数据的保存存储器（214）放置。从形状描述符计算的数据可在高速缓冲存储器（206），以提高连续操作的速度上的窗口进行。优美创建是通过使处理控制逃逸到软件错误处理程序（211）增强。

28. 发明公开

EP0150521A3 DATA PROCESSING SYSTEM WITH IMPROVED INTERRUPT HANDLING 失效
标题翻译：具有改进的中断处理的数据处理系统
公开(公告)号：EP0150521A3
公开(公告)日：1986-12-30
申请号：EP84201481
申请日：1981-04-27
申请人： DATA GENERAL CORPORATION
发明人： ALSING, CARL J. , HOLLAND, CHARLES J. , WALLACH, STEVEN
IPC分类号： G06F9/26 , G06F9/318 , G06F9/38 , G06F9/48 , G06F11/10 , G06F12/14 , G06F9/46
CPC分类号： G06F9/4812 , G06F9/268 , G06F9/3017 , G06F9/30181 , G06F9/30196 , G06F9/3822 , G06F11/10 , G06F11/106 , G06F12/1491
摘要： Certain device interrupts, distinguished at XVCT inter rupts, are handled using four regions on main memory. The in terrupt code is held in two locations (LOC 1,2) in the first re gion and the code in the first location (LOC 1) enables an XVCT interrupt to be recognised. The contents of the second loca tion (LOC 2) are then used as a displacement to point to a loca tion in the second region which is an XVCT table with an entry for each interrupting device. These entries in turn point to areas within the third region, a device control table (DCT). Each such area contains firstly a pointer to the interrupt rou tine (in the fourth memory region) for the device in question, secondly a MASKcode which identifies the other devices which are prevented from interrupting while the device in ques tion is serviced and a processor status register word (PSR) which determines whether or not a fixed point overflow condi tion is to be enabled. Execution of the selected interrupt rou tine is preceded by a conventional stack save (PUSH) opera tion and followed by a restore (POP) operation.

29. 发明授权

EP0097977B1 Frequency synthesizer 失效
标题翻译：频率合成器
公开(公告)号：EP0097977B1
公开(公告)日：1986-11-26
申请号：EP83200684.5
申请日：1981-02-11
申请人： DATA GENERAL CORPORATION
发明人： Bernstein, David H. , Carberry, Richard A. , Druke, Michael B. , Gusowski, Ronald I. , Buckley, Edward M. , March, Roger W.
IPC分类号： H03K23/68 , G06F7/68
CPC分类号： H03K23/667 , G06F9/26 , G06F9/268 , G06F13/22 , G06F13/36 , G06F13/4027 , G06F13/42 , G06F13/4217

30. 发明公开

EP0067556A3 Digital data processing system 失效
标题翻译：数字数据处理系统
公开(公告)号：EP0067556A3
公开(公告)日：1986-01-15
申请号：EP82302596
申请日：1982-05-21
申请人： DATA GENERAL CORPORATION
发明人： Ahlstrom, John K. , Bachman, Brett L. , Belgard, Richard A. , Bernstein, David H. , Bratt, Richard Glenn , Clancy, Gerald F. , Farber, David A. , Gavrin, Edward S. , Gruner, Ronald Hans , Houseman, David L. , Jones, Thomas M. Jones , Katz, Lawrence H. , Mundie, Craig James , Pilat, John F. , Richmond, Michael S. , Schleimer, Stephen I. , Wallach, Steven J. , Wallach, Walter A., Jr. , Wells, Douglas M.
IPC分类号： G06F09/46
CPC分类号： G06F11/0793 , G01R31/318505 , G06F7/00 , G06F7/483 , G06F7/49905 , G06F7/4991 , G06F7/49926 , G06F9/223 , G06F9/226 , G06F9/262 , G06F9/268 , G06F9/35 , G06F9/4488 , G06F9/468 , G06F9/4843 , G06F9/54 , G06F11/0721 , G06F11/073 , G06F12/0875 , G06F12/1483
摘要： The system has a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and the capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users.. The system comprises a plurality of separate, independent job processors (10114) and a memory (10112). Each processor includes a fetch unit (10120) and an execute unit (10122) and the fetch unit structures operands and instructions into objects. The fetch unit includes a register address generator generating unique and permanent identifier codes for the objects. The memory (10112) includes sections storing procedure objects, including a name table providing the operand addresses in the memory. The memory (10112) also includes protection tables for preventing a user obtaining access to objects private to others. The protection tables operate in association with a protection cache in the fetch unit (10120) and an active subject number register which stores a currently active number identifying the user, the procedure he is using and the type of operation instructed. The protection tables store an access control list establishing the access rights,of the subjects and the protection cache in the fetch unit (10120) controls access to the objects by comparing the currently 'active subject number with the requested object. The fetch unit includes a descriptor processor performing the opera- I tions required by the instructions and first and second microcode control means storing first and second sequences of microinstructions for controlling the descriptor processor, the first sequences being S-language instructions which have a uniform, fixed format in an intermediate level language.

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