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    • 12. 发明公开
    • Etching of nano-imprint templates using an etch reactor
    • Ätzungvon NanodruckvorlagenübereinenÄtzreaktor
    • EP1918776A1
    • 2008-05-07
    • EP07020929.1
    • 2007-10-25
    • Applied Materials, Inc.
    • Chandraachood, Madhavi, R.Kumar, Ajay
    • G03F1/08C23F4/00
    • C23F4/00B82Y10/00B82Y40/00G03F1/68G03F1/80G03F7/0002
    • Methods for etching a metal layer using an imprinted resist material are provided. In one embodiment, a method for processing a photolithographic reticle includes providing a reticle (122) having a metal photomask layer (320) formed on an optically transparent substrate (310) and an imprinted resist material deposited on the metal photomask layer, etching recessed regions (398) of the imprinted resist material to expose portions of the metal photomask layer in a first etching step, and etching the exposed portions of the metal photomask layer through the imprinted resist material in a second etching step, wherein at least one of the first or second etching steps utilizes a plasma formed from a processing gas comprising oxygen, halogen and chlorine containing gases. In one embodiment, the process gas is utilized in both the first and second etching steps. In another embodiment, the first and second etching steps are performed in the same processing chamber (100).
    • 提供了使用印刷抗蚀剂材料蚀刻金属层的方法。 在一个实施例中,一种用于处理光刻掩模版的方法包括提供具有形成在光学透明基板(310)上的金属光掩模层(320)和沉积在金属光掩模层上的压印抗蚀剂材料的掩模版(122),蚀刻凹陷区域 (398),以在第一蚀刻步骤中曝光金属光掩模层的部分,并且在第二蚀刻步骤中通过所述压印的抗蚀剂材料蚀刻所述金属光掩模层的暴露部分,其中所述第一蚀刻步骤中的至少一个 或第二蚀刻步骤利用由包含氧,卤素和含氯气体的处理气体形成的等离子体。 在一个实施例中,处理气体用于第一和第二蚀刻步骤。 在另一个实施例中,第一和第二蚀刻步骤在相同的处理室(100)中执行。
    • 13. 发明公开
    • Mask etch process
    • 掩模蚀刻工艺
    • EP1918775A2
    • 2008-05-07
    • EP07020637.0
    • 2007-10-22
    • Applied Materials, Inc.
    • Chandrachood, Madhavi, R.Sabharwal, AmitabhLeung, Toi, Yue, BeckyGrimbergen, Michael
    • G03F1/08
    • G03F1/80
    • Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate (122) having a metal photomask layer (320) disposed on a optically transparent material in a processing chamber, introducing a processing gas processing gas comprising an oxygen containing gas, a chlorine containing gas, at least one of trifluoromethane (CHF 3 ), sulfur hexafluoride (SF 6 ), hexafluoroethane (C 2 F 6 ) or ammonia (NH 3 ) and optionally a chlorine-free halogen containing gas and/or an inert gas, into the processing chamber, generating a plasma of the processing gas in the processing chamber, and etching exposed portions of the metal layer disposed on the substrate.
    • 提供了用于蚀刻设置在诸如光刻掩模版的基板上的金属层的方法和装置。 一方面,提供了一种用于处理衬底的方法,该方法包括:将具有布置在处理室中的光学透明材料上的金属光掩模层(320)的衬底(122)定位,引入包含含氧气体的处理气体处理气体, (CHF 3),六氟化硫(SF 6),六氟乙烷(C 2 F 6)或氨(NH 3)中的至少一种和任选的不含氯的含卤素气体和/或惰性气体中的至少一种加入处理室中, 在处理室中产生处理气体的等离子体,并且蚀刻设置在衬底上的金属层的暴露部分。
    • 18. 发明公开
    • INTEGRATED CIRCUIT DESIGN METHOD, DESIGN SUPPORT PROGRAM USED IN THE INTEGRATED CIRCUIT DESIGN METHOD, AND INTEGRATED CIRCUIT DESIGN SYSTEM
    • 方法集成电路设计,AT所用设计支援计划和系统集成电路设计设计集成电路的过程
    • EP1724813A1
    • 2006-11-22
    • EP05710099.2
    • 2005-02-10
    • Japan Science and Technology Agency
    • KAWAMOTO, Hiroshi
    • H01L21/02G03F1/08G03F1/16G06F17/50H01L21/027H01L21/82
    • G06F17/5045
    • [PROBLEMS] To provide an integrated circuit design method realized as a photomask/photomaskless fusion method wherein a photomask trial method and a photomaskless trial method are fused with each other so as to obtain both a merit of the photomask trial method allowing production of trial chips without producing photomasks and a merit of the photomaskless trial method allowing use of pattern information for a trial production as pattern information for a mass production trial. To provide a design assistance program and an integrated circuit design system used in such an integrated circuit design method. [SOLVING MEANS] A trial integrated circuit is produced based on pattern information for a trial production, without using a photomask, under a common design circumstance which can be utilized in both a photomaskless step of producing an integrated circuit based on pattern information without using a photomask and a photomask step of producing an integrated circuit based on pattern information with using a photomask, with the pattern information for the trial production complying with both the photomaskless step and the photomask step. A common pattern information is prepared by evaluating the trial integrated circuit and by modifying the pattern information for the trial production in accordance with results of the evaluation, if necessary, without being modified. A photomask for a mass production is produced by carrying out a formal conversion of the common pattern information, if necessary.
    • [问题]为了提供关于实现为光掩模/ photomaskless融合方法worin光掩模试验方法和photomaskless试验方法融合彼此集成电路设计方法,以便获得这两个所涉及的光掩模试方法允许生产的试片的优点 而不产生光掩模和试验方法photomaskless允许使用的图案信息为试制作为用于大量生产试验图案信息的优点。 提供一种设计援助方案,在寻求集成电路设计方法中使用的集成电路设计系统。 [解决手段]一种试验集成电路基于用于试生产图案信息产生,不使用光掩模,在一个共同的设计环境可以在两种以基于图案信息集成电路制造,而无需使用的photomaskless步骤被用于 光掩模,并在基于图案信息与使用光掩模,与用于试生产与两个photomaskless步骤和光掩模步骤相符的图案信息的集成电路制造的光掩模步骤。 一个常见的模式信息是通过评估试验集成电路和通过修改试生产中雅舞的评价的结果的图案信息,并根据需要,没有被修改制备。 一种用于大量生产光掩模通过进行的共用图案信息的正式转换,如果有必要生产。