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11. 发明授权

EP1096607B1 Bus bar-connecting structure 有权
标题翻译：母线连接结构
公开(公告)号：EP1096607B1
公开(公告)日：2003-04-02
申请号：EP00120021.1
申请日：2000-09-14
申请人： AUTONETWORKS TECHNOLOGIES, LTD. , SUMITOMO WIRING SYSTEMS, Ltd. , SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： Onizuka, Takahiro, c/o AUTONETWORKS TECH., LTD.
IPC分类号： H01R9/24 , H01R43/02
CPC分类号： H05K3/4038 , H01R9/2458 , H01R43/0221 , H05K1/0289 , H05K3/202 , H05K3/4084 , H05K2201/0394 , H05K2203/107 , H05K2203/128

12. 发明公开

EP1052696A3 Electrical interconnection medium 失效
标题翻译：电子邮件
公开(公告)号：EP1052696A3
公开(公告)日：2001-05-02
申请号：EP00114951.7
申请日：1994-02-24
申请人： THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS
发明人： Schaper, Leonard W.
IPC分类号： H01L23/538
CPC分类号： H01L23/5386 , H01L23/5383 , H01L24/48 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/01014 , H01L2924/01039 , H01L2924/01078 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/0289 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00 , H01L2224/45099
摘要： An electrical interconnection medium having a plurality of first conductive regions arranged in first and second layers and interconnected to form a first offset mesh plane of a first electrical potential and a signal path comprising at least a selected isolated portion of at least one of the first conductive regions which selected portion would otherwise be a part of the offset mesh plane.
摘要翻译：一种电互连介质，其具有布置在第一和第二层中并互连以形成第一电位的第一偏移网格平面的多个第一导电区域和包括至少一个第一导电的至少一个的选定隔离部分的信号路径选择部分的区域否则将是偏移网格平面的一部分。

13. 发明公开

EP1069617A2 Multilayer wiring board 审中-公开
标题翻译：多层线路板
公开(公告)号：EP1069617A2
公开(公告)日：2001-01-17
申请号：EP00114903.8
申请日：2000-07-14
申请人： NEC CORPORATION
发明人： Tanaka, Shinji
IPC分类号： H01L23/538
CPC分类号： H05K1/114 , H01L23/5384 , H01L23/5386 , H01L2224/16225 , H01L2924/15312 , H05K1/0289 , H05K1/115 , H05K2201/09627 , H05K2201/09709 , H05K2201/09854 , H05K2201/10674
摘要： A wiring layer on which X-directional signal lines 20 to 22 are arranged is formed on a multilayer board. Rectangular power-source conductive patterns 10c are arranged each in which via holes 120 are formed longitudinally or in the wiring direction of the X-directional signal lines 20 to 22. The area (batched with broken lines) acts as a wiring channel for the X-directional signal line 22.
摘要翻译：其上布置有X方向信号线20至22的布线层形成在多层板上。矩形电源导体图案10c分别配置有纵向或X方向信号线20〜22的配线方向上形成有通孔120.该区域（虚线配线）作为X - 双向信号线22。

14. 发明公开

EP1017133A3 Electrical connector housing 审中-公开
标题翻译：一种电连接器外壳
公开(公告)号：EP1017133A3
公开(公告)日：2000-07-19
申请号：EP99403196.1
申请日：1999-12-17
申请人： Sumitomo Wiring Systems, Ltd.
发明人： Hattori, Yukimitsu, Sumitomo Wiring Systems, ltd. , Ito, Takeharu, Sumitomo Wiring Systems, ltd. , Matsuoka, Mitsuhiko, Sumitomo Wiring Systems, ltd. , Oishi, Akinori, Sumitomo Wiring Systems, ltd. , Kasai, Koji, Sumitomo Wiring Systems, ltd.
IPC分类号： H01R9/24 , H02B1/20
CPC分类号： H02B1/207 , H01R9/24 , H05K1/0289 , Y10S439/949
摘要： The circuitry contained in an electrical connector housing is standardized, so that its manufacturing, modification and addition can be simplified. To this end, a circuitry is designed so as to comprise a plurality of unit circuits, both ends of which are to be connected to an electrical part such as a relay (R), fuse (F1 and F2) or connector (C1, C2, C3 and C4). These unit circuits are made of the same electrically conductive material (20a to 20g) and formed into a long and narrow element. The unit circuits are arranged in parallel at a given pitch to one another. The electrically conductive element (20a to 20g) of each unit circuit is connected to the electrical part through another electrically conductive element (22a to 22o) arranged substantially perpendicular thereto.

15. 发明公开

EP0629107A3 Multiple wiring and X section printed circuit board technique 失效
标题翻译：多个布线和跨电路板技术。
公开(公告)号：EP0629107A3
公开(公告)日：1995-09-13
申请号：EP94108594.6
申请日：1994-06-01
申请人： International Business Machines Corporation
发明人： Conn, Robert Barry , Darleen,Mayo , Youngs, Thurston Bryce, Jr.
IPC分类号： H05K1/00
CPC分类号： H05K1/0265 , H05K1/0262 , H05K1/0289 , H05K3/4641 , H05K2201/0191 , H05K2201/0352 , H05K2201/09327 , H05K2201/09336
摘要： Multiple circuit functions embodied in electrical circuit lines and areas are supported by a multilayered printed circuit board of various lengths and widths (defining "x" and "y" directions) and of various thicknesses (defining a "z" direction) all on a single board. Several ways of achieving such variations in thickness include providing two layer subassemblies arranged in an alternate and intermediate manner, one subassembly being adapted to support electrical circuit lines and areas, and the other subassembly being formed of thin film dielectric material of various precalculated thicknesses. Another way of achieving a variation in thickness is to limit the surface covered by circuit lines with a pre-calculated core thickness.

16. 发明公开

EP0525217A1 Carrier for electronic components 失效
标题翻译： Trägerfürelektronische Komponenten。
公开(公告)号：EP0525217A1
公开(公告)日：1993-02-03
申请号：EP91111737.2
申请日：1991-07-15
申请人： International Business Machines Corporation
发明人： Auber, Roland , Deegen, Axel, Dipl.-Ing. , Frick, Helmut, Dipl.-Ing. , Gruber, Harald W. , Horbach, Heinz-G., Dipl.-Ing. , Stadler, Ewald E., Dipl.-Ing.
IPC分类号： H05K7/06
CPC分类号： H05K7/06 , H05K1/0287 , H05K1/0289 , H05K2203/175
摘要： 5 n7 A carrier on which electronic components (14) and electrical circuits (18, 20) are mounted and connected. The carrier comprises a wire mesh or web (8) which is used as a basic material for a number of applications. For organically or inorganically wires, electrically conductive material or super conducting fibers may be used. The wires may be fabricated as a web or an X/Y layer. The chip can be directly mounted on a mesh of insulated conductive wires. This eliminates one complete packaging level (module) and replaces the complex printed circuit card/board by a simple wire mesh. Personalized X/Y wiring for signals and voltage is accomplished by interconnecting the wire crossings (22) as required and by deleting stubs. Depending upon the diameter of the wires used, more than one wire may be required for providing sufficient power to the chip. The mesh may be assembled on a stiffener with tabs to interconnect with other components or be used directly as a cable. Chip-to-wire interconnection are obtained by removing the insulation and by soldering the chip to the wire. The web may also be fixed to a board or by an appropriate frame. Further disclosed is a method for manufacturing the new carrier and a system comprising the carrier.
In addition to affording high-quality components, alternative manufacturing techniques allow using the advantages of CIM (Computer Integrated Manufacturing), CFM (Continuous Flow Manufacturing), TAT (Tape Auto Testing), lot size = 1, and ECs (engineering changes)/repairs. CFM and TAT concepts are realized by reducing the manufacturing steps to about one third the number presently needed. In addition, most steps are not as complicated and expensive as the classical ones used to produce printed circuit boards.
摘要翻译：电子部件（14）和电路（18,20）安装并连接的载体。载体包括用作许多应用的基本材料的丝网或网（8）。对于有机或无机导线，可以使用导电材料或超导纤维。导线可以制成网状物或X / Y层。芯片可以直接安装在绝缘导线网上。这消除了一个完整的封装水平（模块），并通过简单的金属丝网代替复杂的印刷电路板/板。用于信号和电压的个性化X / Y布线是通过根据需要互连电线交叉（22）和通过删除短截线实现的。根据所使用的电线的直径，可能需要多于一根电线来为芯片提供足够的电力。网可以组装在具有突出部的加强件上以与其他部件互连或者直接用作电缆。通过去除绝缘体并通过将芯片焊接到导线上获得芯片到线路互连。网也可以固定到板或适当的框架上。还公开了一种用于制造新载体的方法和包括该载体的系统。除了提供高质量的组件外，替代制造技术还可以使用CIM（计算机集成制造），CFM（连续流程制造），TAT（磁带自动测试），批量大小= 1和EC（工程变更）/ 维修。 CFM和TAT概念通过将制造步骤减少到现在所需数量的三分之一来实现。此外，大多数步骤不像用于生产印刷电路板的经典步骤那么复杂和昂贵。

17. 发明公开

EP0518701A2 Field programmable circuit module 失效
标题翻译： Anwender程序员Schaltungsmodul。
公开(公告)号：EP0518701A2
公开(公告)日：1992-12-16
申请号：EP92305443.1
申请日：1992-06-12
申请人： APTIX CORPORATION
发明人： Osann, Robert, Jr. , Shaw, George A., Jr. , Mohsen, Amr M.
IPC分类号： G06F15/60 , H05K1/00
CPC分类号： H01L23/5382 , H01L2224/49171 , H01L2924/10253 , H05K1/0289 , H05K1/112 , H05K2201/09945 , H05K2201/10689 , H05K2203/175 , H01L2924/00
摘要： The invention uses a programmable interconnect substrate having a plurality of conductive and interconnectable vias located on one or both surfaces thereof. A customised pattern of bonding pads is then formed over the one or both surface of the substrate which correspond to the terminal footprints of specific surface mounted packages intended to be mounted on the substrate. A generalised pattern of bonding pads may also be formed on the surface of the substrate for electrically connecting terminals of bare dice thereto by means of thin wire. All bonding pads are electrically connected to one or more vias by direct electrical contact or by a conductive trace extending from the bonding pad to a nearly via.
摘要翻译：本发明使用具有位于其一个或两个表面上的多个导电和可互连通孔的可编程互连基板。然后在衬底的一个或两个表面上形成定制的焊盘图案，该表面对应于期望安装在衬底上的特定表面安装封装的端子脚印。也可以在基板的表面上形成接合焊盘的一般化图案，用于通过细线电连接裸芯片的端子。所有接合焊盘通过直接电接触或通过从接合焊盘延伸到几乎通孔的导电迹线而电连接到一个或多个通孔。

18. 发明授权

EP0278485B1 Verfahren zur Herstellung eines Digitalisiertabletts 失效
标题翻译：制作数字化板的过程
公开(公告)号：EP0278485B1
公开(公告)日：1992-12-16
申请号：EP88101905.3
申请日：1988-02-10
申请人： Aristo Graphic Systeme GmbH & Co KG
发明人： Schrodt, Hans-Joachim
IPC分类号： G06K11/06 , H05K3/40 , H05K3/16 , H05K3/46
CPC分类号： H05K3/4069 , H05K1/0289 , H05K1/095 , H05K3/16 , H05K3/4664 , H05K2201/0317

19. 发明公开

EP0310357A3 Customizable circuitry 失效
标题翻译：可定制电路
公开(公告)号：EP0310357A3
公开(公告)日：1991-01-09
申请号：EP88308996.3
申请日：1988-09-28
申请人： Microelectronics and Computer Technology Corporation
发明人： Carey, David H.
IPC分类号： H05K1/00
CPC分类号： H01L23/5383 , H01L23/4985 , H01L23/5382 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2924/09701 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/0289 , H01L2924/00014 , H01L2924/00
摘要： A customizable circuit using a programmable interconnect and a compatible TAB chip bonding design. The programmable interconnect comprises layers of wire segments forming programmable junctions rather than continuous wires. This segmentation is performed with an offset from line to line in each layer such that the ends of the segments in each layer form along diagonal lines having a pitch determined by the basic wire segment length. The terminal ends of each of these segments are positioned in a plane such that the segments may be connected by short lengths to form the desired interconnect. The links which join the line segments represent the customization of the otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed are methods for forming the interconnect and the TAB chip bonding design.
摘要翻译：使用可编程互连和兼容TAB芯片接合设计的可定制电路。可编程互连包括形成可编程结而不是连续导线的线段层。该分割是利用每一层中的线对线的偏移来执行的，使得每个层中的段的端部沿着具有由基本线段长度确定的间距的对角线形成。这些片段中的每一个的末端位于平面中，使得片段可以通过短长度连接以形成所需的互连。连接线段的链接代表了否定的未互连互连的定制。 TAB芯片接合设计使用载带将集成电路芯片连接到可编程互连。还公开了用于形成互连和TAB芯片接合设计的方法。

20. 发明公开

EP0378016A1 Dispositif de raccordement de composants et module fonctionnel l'utilisant 失效
标题翻译：安排用于连接含有这种功能模块的部件和组件。
公开(公告)号：EP0378016A1
公开(公告)日：1990-07-18
申请号：EP89403360.4
申请日：1989-12-05
申请人： THOMSON-CSF
发明人： Prevost, Michel
IPC分类号： H05K1/00 , H05K1/11
CPC分类号： H05K1/112 , H01L23/5383 , H01L2924/0002 , H05K1/0289 , H05K1/0298 , H05K1/141 , H05K3/403 , H05K2201/049 , H05K2201/0919 , H05K2201/09472 , H05K2201/10674 , H01L2924/00
摘要： L'Invention concerne un dispositif de raccordement de composants qui comporte plusieurs lamelles (1, 2, 3, 4) empilées et assemblées. Chaque lamelle est réalisée dans un matériau isolant et comporte des pistes conductrices (11 ; 21 ; 31 ; 41) rectilignes et parallèles entre elles ; les pistes de deux lamelles adjacentes sont perpendiculaires ; les pistes des différentes lamelles sont réalisées d'un côté donné du dispositif. Le dispositif comporte des zones (12, 16) pour la connexion d'un composant sur celle des faces portant des pistes qui est libre, et ces zones sont électriquement reliées à des pistes (11, 21, 31) des autres lamelles ; enfin, les pistes 11 ; 21 ; 31 ; 41) des différentes lamelles se prolongent en zone de connexion (10 ; 20 ; 30 ; 40) avec l'extérieur.
L'invention concerne également un module fonctionnel comportant plusieurs dispositifs de raccordement.
摘要翻译：本发明涉及一种设备，用于连接，其包括几个层叠并装配片（1，2，3，4）的部件。每个片由在绝缘材料制成，并包括导电迹线（11; 21; 31; 41）是直的并且彼此平行; 两个相邻片的轨道是直角; 各片材的轨迹上的装置的给定侧产生。该装置包括用于组件的连接区域（12，16）上做轨道承载面全部是免费的，以及合成的区域被电连接到迹线（11，21，31）中的其它片; 最后轨道（11; 21; 31; 41）的各个片材的延伸入区（10; 20; 30; 40）与外部连接。 ... 本发明因此涉及到的功能模块，其包括多个连接设备。 ... ...

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