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    • 103. 发明公开
    • Digital servo system for motor driven apparatus
    • 用于电机驱动装置的数字伺服系统
    • EP0262952A3
    • 1990-05-16
    • EP87308668.0
    • 1987-09-30
    • KABUSHIKI KAISHA TOSHIBA
    • Ito, Kenji
    • G11B15/46G11B15/28
    • G11B15/4673Y10S388/903Y10S388/912Y10S388/915
    • A digital servo system comprising source means of a clock signal, counter means, latch means which latches a predetermined lower bits of the output of the counter means, means for obtaining a servo control output in response to the latch means, and sequencer means which is applied with a digital data of which the pulse interval or the phase is processed, and controls passing or nonpassing of the clock signal to the counter means in response to the digital data and obtains a latch pulse for the latch device. The servo system is characterized by that the servo system further comprises a circuit for stopping the input of the clock signal to the counter by controlling the counter when the digital data is applied, a latch circuit for latching a most significant bit of the predetermined lower bits, a sequencer for shifting a specified bits of the count data of the counter, and a linear range identifying circuit for identifying the upper limit and lower limit of the servo control output and the linear range between them using the output of the latch circuit for the most significant bit and the shifted specified bit output of the counter.
    • 106. 发明公开
    • Control system with improved robustness to disturbances
    • 改进的鲁棒性对干扰的控制系统
    • EP0237317A3
    • 1988-07-27
    • EP87302022
    • 1987-03-10
    • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    • Gotou, Makoto
    • G05B13/02H02P07/00
    • H02P23/0077Y10S388/906Y10S388/912Y10S388/921
    • A control system has a detecting block (12) for obtaining a detected signal corresponding to a controlled variable of a controlled system and a controlling block (13) for supplying the controlled system (11) with a control signal corresponding to the detected signal. The controlling block (13) comprises an error block (3A) for producing an error signal (E) corresponding to the detected siganl (S) at intervals of a detecting period of time, a memorizing block (3C) having a plurality of memorized values corresponding to the error signal, and an output block (3B) for producing the control signal (C S ) by mixing the error signal (E) and one or more memorized values of the memorizing block (3C). The memorizing block (3C) renews the memorized values (M(Ib)) sequentially and periodically at intervals of a renewing cycle period of time equal to Q times the detecting period, each with a value corresponding to a mixed value of the error signal (Ec) and one or more of the memorized values having been renewed at intervals of L renewing cycle periods, where each of Q and L is an integer at least equal to 2. Preferably, the memorizing block (3C) includes a filtering error block (3C c ) with a low-pass filter characteristic for producing a filtered error signal (E c ), and the mixed value is obtained by mixing the filtered error signal (E c ) and the one or more of the memorized value. Preferably, a microprocessor excutes the tasks of the error block (3A), the memorizing block (3C) and the output block (3B).
    • 108. 发明公开
    • Motor rotation control apparatus
    • Motorumdrehungszahl-Regelgerät。
    • EP0249465A1
    • 1987-12-16
    • EP87305148.6
    • 1987-06-10
    • SONY CORPORATION
    • Machida, Yukihiko c/o Patent DivisionTomitaka, Tadafusa c/o Patent Division
    • G05D13/62
    • H02P23/186Y10S388/901Y10S388/903Y10S388/91Y10S388/912Y10S388/915Y10S388/921Y10S388/93
    • A motor rotation control apparatus employs a comb filter circuit (10) to filter out a signal component and its higher harmonics. An error signal (DS) indicative of an error between actual and target conditions of rotation of the motor is applied to the comb filter circuit (10) after a direct current component thereof is removed. The filtered signal and the error signal are added in a circuit (90) which produces a control signal used to control rotation of the motor (50). Predetermined successive portions (samples) of the error signal may each be divided into a first digital signal portion having a predetermined number of upper bits of data and a second digital signal portion having the remaining lower bits of data. The lower bits are delayed a predetermined time and added to the error signal to compensate for lower bits of data which may be ignored in a digital-­to-analog converter, operable on a limited number of bits, to provide an analog control signal used to control rotation of the motor.
    • 电动机旋转控制装置使用梳状滤波器电路(10)来滤除信号分量及其高次谐波。 指示电动机的实际和目标转动条件之间的误差的误差信号(DS)在去除了其直流分量之后被施加到梳状滤波器电路(10)。 经过滤波的信号和误差信号被加到产生用于控制马达(50)的旋转的控制信号的电路(90)中。 误差信号的预定连续部分(采样)可以各自被划分为具有预定数量的高位数据的第一数字信号部分和具有其余低位数据的第二数字信号部分。 较低位被延迟预定时间并且被加到误差信号上以补偿在数模转换器中可被忽略的较低位数据,该数模转换器可在有限数量的位上操作,以提供用于 控制电机的旋转。
    • 109. 发明公开
    • Control system with improved robustness to disturbances
    • 控制系统具有改进的抗干扰能力。
    • EP0237317A2
    • 1987-09-16
    • EP87302022.6
    • 1987-03-10
    • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    • Gotou, Makoto
    • G05B13/02H02P7/00
    • H02P23/0077Y10S388/906Y10S388/912Y10S388/921
    • A control system has a detecting block (12) for obtaining a detected signal corresponding to a controlled variable of a controlled system and a controlling block (13) for supplying the controlled system (11) with a control signal corresponding to the detected signal. The controlling block (13) comprises an error block (3A) for producing an error signal (E) corresponding to the detected siganl (S) at intervals of a detecting period of time, a memorizing block (3C) having a plurality of memorized values corresponding to the error signal, and an output block (3B) for producing the control signal (C S ) by mixing the error signal (E) and one or more memorized values of the memorizing block (3C). The memorizing block (3C) renews the memorized values (M(Ib)) sequentially and periodically at intervals of a renewing cycle period of time equal to Q times the detecting period, each with a value corresponding to a mixed value of the error signal (Ec) and one or more of the memorized values having been renewed at intervals of L renewing cycle periods, where each of Q and L is an integer at least equal to 2. Preferably, the memorizing block (3C) includes a filtering error block (3C c ) with a low-pass filter characteristic for producing a filtered error signal (E c ), and the mixed value is obtained by mixing the filtered error signal (E c ) and the one or more of the memorized value. Preferably, a microprocessor excutes the tasks of the error block (3A), the memorizing block (3C) and the output block (3B).
    • 110. 发明公开
    • Servo control of a motor speed by using a phase locked loop
    • 使用相位耦合电路的电动机速度的伺服控制。
    • EP0204903A1
    • 1986-12-17
    • EP86103850.3
    • 1986-03-21
    • International Business Machines Corporation
    • Kilen, Richard ScottRittenhouse, Larry Edward
    • G05D13/62
    • H02P23/186Y10S388/902Y10S388/911Y10S388/912
    • @ The speed of a DC motor is controlled by a servo which includes a digital phase lock loop. The motor drives a tachometer whose pulse (22) frequency is low relative to the frequency of a clock - (21). The clock continuously drives a counter (200) whose ever increasing number content is gated to a data latch (26) upon the occurrence of each successive tachometer pulse, thus this data latch contains a first time-number of ever increasing magnitude. A second data latch (24) contains a second number. The difference in magnitude of two consecutive time-numbers is indicative of motor speed. Initially, this second number is set to contain a reference number (REF) which is equal in magnitude to the number of clock pulses which will occur between adjacent tachometer pulses when the motor is running at desired speed. A pair of limit numbers - (RANGEL and RANGEH) are provided to define the upper and lower limits of servo saturation. The difference between the first number and the second number is detected upon the occurrence of each tachometer pulse to generate a third or difference number (ERRA). This difference number is compared to the two limit numbers to determine if the servo is in saturation. If it is not in saturation, the second number is reset to a value which is equal to the old value plus the reference number. If the servo is in saturation, the second number is reset to a number which is a function of the first number, the reference number, and that limit number which is associated with the particular mode of saturation.