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91. 发明公开

EP0675538A3 Integrated circuit package with flat topped heat sink 失效转让
标题翻译：集成电路封装与平顶散热片
公开(公告)号：EP0675538A3
公开(公告)日：1995-12-13
申请号：EP94308868.2
申请日：1994-11-30
申请人： SGS-THOMSON MICROELECTRONICS, INC.
发明人： Hundt, Michael J.
IPC分类号： H01L23/367 , H01L23/544
CPC分类号： H01L23/544 , H01L23/3677 , H01L2223/54433 , H01L2223/54473 , H01L2223/54486 , H01L2924/0002 , Y10T29/4935 , Y10T29/49826 , H01L2924/00
摘要： An integrated circuit package is disclosed, of the type having a pin-fin heat sink attached to the surface. A flat plate is attached to the ends of the pins of the heat sink, to provide a planar surface area of adequate size to allow a vacuum pickup tool to pick and place the packaged integrated circuit, and to receive marking and symbolization.
摘要翻译：公开了一种集成电路封装，其类型具有附接到表面的针状散热片。将平板连接到散热器的引脚的端部，以提供具有足够尺寸的平面表面区域，以允许真空拾取工具拾取和放置封装的集成电路，并接收标记和符号。

92. 发明公开

EP0360647A1 Dispositif de codage notamment pour carte à circuits intégrés 失效
标题翻译： Kodiervorrichtung，insbesonderefürLeiterplatten。
公开(公告)号：EP0360647A1
公开(公告)日：1990-03-28
申请号：EP89402379.5
申请日：1989-08-31
申请人： APR COMPOSANTS
发明人： De Mari, Daniel
IPC分类号： H05K1/00 , H05K3/04 , H05K1/18 , H05K7/06
CPC分类号： H05K3/222 , H01L23/544 , H01L2223/54473 , H01L2223/54486 , H01L2924/0002 , H05K1/0266 , H05K1/029 , H05K1/18 , H01L2924/00
摘要： L'invention concerne un dispositif de codage notamment pour cartes à circuits intégrés.
Ce dispositif comprend une pluralité d'éléments électriquement conducteurs (1) qui relient chacun au moins deux points d'un circuit imprimé et sont susceptibles d'être interrompus entre ces deux points de façon à définir un état de codage numérique par leur état interrompu ou non. Le dispositif est caractérisé en ce qu'une pluralité d'éléments conducteurs (1) est incorporée à un corps réalisé en un matériau isolant de façon à former un composant de codage, que le corps (2) comporte pour chaque élément (1) un évidement (5) ouvert vers l'extérieur et traversé par ledit élément (1) et que la partie ainsi accessible de l'extérieur de cet élément comporte avantageusement une zone de rupture (6) permettant la programmation de l'élément.
L'invention est utilisable pour des cartes à circuits intégrés.
摘要翻译：本发明涉及特别用于印刷电路板的编码装置。该装置包括多个导电元件（1），每个导电元件（1）各自连接印刷电路的至少两个点，并且能够在这两个点之间中断，以便通过其中断的或中断的方式定义数字编码状态非中断状态。该装置的特征在于，在由绝缘材料制成的主体中并入多个导电元件（1）以形成编码部件，其中，对于每个元件（1），主体（2）包括凹部（5），其朝向外部打开并且被所述元件（1）穿过，并且因为从该元件的外部可容易接近的部分有利地包括能够对元件进行编程的中断区域（6）。本发明可用于印刷电路板。 ... ...

93. 发明公开

EP0157008A2 Electronic device having a package 失效
标题翻译： ElektronischesGerätmit einer Packung。
公开(公告)号：EP0157008A2
公开(公告)日：1985-10-09
申请号：EP84116284.5
申请日：1984-12-24
申请人： HITACHI, LTD.
发明人： Oka, Noriaki
IPC分类号： H01L23/31 , H01L23/00 , H01L23/58
CPC分类号： H01L23/60 , H01L23/3107 , H01L23/544 , H01L2223/54406 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2924/0002 , H01L2924/00
摘要： An electronic device comprises a package (12) whose front surface has a part (18) formed into a mirror finished surface, the other part (16) being formed into a roughened surface or having a plurality of protrusions. The area of contact between the roughened surface part (16) of the package (12) and a handling appliance or the like can be diminished, and the quantity of electrostatic charges to be generated by friction and to be stored in the electronic device can be reduced, thereby to enhance the electrostatic breakdown strength of the electronic device. Besides, the mirror finished surface part (18) can be marked by the use of a laser, and vivid and durable marks can be applied to the electronic device.
摘要翻译：一种电子设备，包括：前表面具有形成为镜面精加工表面的部分（18）的封装（12），另一部分（16）形成为粗糙表面或具有多个突起。可以减少包装（12）的粗糙化表面部分（16）与处理装置等之间的接触面积，并且通过摩擦产生并存储在电子装置中的静电电荷量可以是从而提高电子器件的静电击穿强度。此外，可以通过使用激光来标记镜面加工表面部分（18），并且可以对电子设备施加生动耐用的标记。

94. 发明公开

EP3392904A1 CHIP-BONDING SYSTEM AND METHOD 审中-实审
公开(公告)号：EP3392904A1
公开(公告)日：2018-10-24
申请号：EP16874862.2
申请日：2016-12-15
申请人： Shanghai Micro Electronics Equipment (Group) Co., Ltd.
发明人： CHEN, Yonghui , TANG, Shiyi , LI, Huili
IPC分类号： H01L21/67 , H01L21/56
CPC分类号： H01L21/67121 , H01L21/67144 , H01L21/6835 , H01L23/544 , H01L24/75 , H01L24/83 , H01L2221/68309 , H01L2221/68354 , H01L2223/54426 , H01L2223/54486 , H01L2224/7565 , H01L2224/7598 , H01L2224/8313 , H01L2224/83203 , H01L2224/951 , H01L2224/95136
摘要： A die bonding system and a die bonding method are disclosed, in which dies (10) fed from a first motion stage (100) serving as a die source are re-arranged on a transfer tray (20) carried on a second motion stage (200) and bonded to a substrate (30) carried on a third motion stage (300). Pickup and transfer of the dies (10) between the three motion stages are accomplished by two motion mechanisms (010, 020) in such a manner that the dies (10) picked up from the first motion stage (100) are placed on the second motion stage (200) in an arrangement based upon a required final arrangement of them on the substrate (30). In other words, the dies (10) are re-arranged according to the required arrangement on the substrate (30). In this way, the need for re-arranging the dies after the transfer tray (20) is flipped and before they are bonded to the substrate is eliminated. Therefore, with the die bonding system, multiple dies 10 are allowed to be transferred simultaneously to the substrate based on the process requirements by flipping the mechanism for flipping the dies only once, which results in enhanced production efficiency and time savings and addresses the requirements for mass production.

95. 发明公开

EP3346492A3 SEMICONDUCTOR CHIP PACKAGE AND FABRICATION METHOD THEREOF 无效
公开(公告)号：EP3346492A3
公开(公告)日：2018-08-08
申请号：EP17197972.7
申请日：2017-10-24
申请人： MediaTek Inc.
发明人： TSAI, Shiann-Tsong , WANG, Hsueh-Te
IPC分类号： H01L23/49 , H01L23/482 , H01L25/10 , H01L23/544 , H01L21/60 , H01L23/433 , H01L23/498 , H05K1/09 , H01L23/31 , H01L23/373
CPC分类号： H01L25/105 , H01L21/6835 , H01L23/3171 , H01L23/3733 , H01L23/4334 , H01L23/4828 , H01L23/49883 , H01L23/544 , H01L24/05 , H01L24/48 , H01L24/75 , H01L24/81 , H01L24/85 , H01L2221/68345 , H01L2223/54486 , H01L2224/02166 , H01L2224/05124 , H01L2224/05624 , H01L2224/48247 , H01L2224/48479 , H01L2224/48499 , H01L2224/75272 , H01L2224/81855 , H01L2224/85186 , H01L2224/85855 , H01L2924/181 , H01L2924/00014 , H01L2224/48471 , H01L2924/00012
摘要： A semiconductor chip package includes a substrate; a semiconductor die (120) mounted on the substrate, wherein the semiconductor die (120) comprises a bond pad (122) disposed on an active surface of the semiconductor die (120), and a passivation layer (124) covering perimeter of the bond pad (122), wherein a bond pad opening (124a)in the passivation layer (124) exposes a central area of the bond pad (122); a conductive paste post (130) printed on the exposed central area of the bond pad (122) ; and a bonding wire (180) secured to a top surface of the conductive paste post (130). The conductive paste post preferably comprises copper paste.

96. 发明公开

EP3346492A2 SEMICONDUCTOR CHIP PACKAGE AND FABRICATION METHOD THEREOF 无效
公开(公告)号：EP3346492A2
公开(公告)日：2018-07-11
申请号：EP17197972.7
申请日：2017-10-24
申请人： MediaTek Inc.
发明人： TSAI, Shiann-Tsong , WANG, Hsueh-Te
IPC分类号： H01L23/49 , H01L23/482 , H01L25/10 , H01L23/544 , H01L21/60 , H01L23/433 , H01L23/498 , H05K1/09 , H01L23/31 , H01L23/373
CPC分类号： H01L25/105 , H01L21/6835 , H01L23/3171 , H01L23/3733 , H01L23/4334 , H01L23/4828 , H01L23/49883 , H01L23/544 , H01L24/05 , H01L24/48 , H01L24/75 , H01L24/81 , H01L24/85 , H01L2221/68345 , H01L2223/54486 , H01L2224/02166 , H01L2224/05124 , H01L2224/05624 , H01L2224/48247 , H01L2224/48479 , H01L2224/48499 , H01L2224/75272 , H01L2224/81855 , H01L2224/85186 , H01L2224/85855 , H01L2924/181 , H01L2924/00014 , H01L2224/48471 , H01L2924/00012
摘要： A semiconductor chip package includes a substrate; a semiconductor die (120) mounted on the substrate, wherein the semiconductor die (120) comprises a bond pad (122) disposed on an active surface of the semiconductor die (120), and a passivation layer (124) covering perimeter of the bond pad (122), wherein a bond pad opening (124a)in the passivation layer (124) exposes a central area of the bond pad (122); a conductive paste post (130) printed on the exposed central area of the bond pad (122) ; and a bonding wire (180) secured to a top surface of the conductive paste post (130). The conductive paste post preferably comprises copper paste.

97. 发明公开

EP3343612A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：EP3343612A1
公开(公告)日：2018-07-04
申请号：EP17203604.8
申请日：2017-11-24
申请人： Renesas Electronics Corporation
发明人： Muto, Kuniharu , Kanda, Ryo
IPC分类号： H01L25/16 , H01L23/495 , H02M7/00
CPC分类号： H01L23/562 , H01L21/4825 , H01L21/4842 , H01L21/565 , H01L21/78 , H01L23/3114 , H01L23/495 , H01L23/49513 , H01L23/4952 , H01L23/49531 , H01L23/49562 , H01L23/49575 , H01L23/544 , H01L24/48 , H01L2223/54486 , H01L2224/0603 , H01L2224/48137 , H01L2224/48139 , H01L2224/48155 , H01L2224/48245 , H01L2224/4903 , H01L2924/1203 , H01L2924/13055 , H01L2924/14252 , H01L2924/19043 , H01L2924/19105 , H01L2924/351 , H02M7/003 , H02M7/5387 , H02M2001/0009 , H02P27/06
摘要： An improvement is achieved in the performance of a semiconductor device. The semiconductor device includes a plurality of first semiconductor chips, a plurality of second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to electrodes on both ends of the resistive component. A sealing body has a first side (long side), a second side (long side), a third side (short side), and a fourth side (short side). In a Y-direction, each of the first semiconductor chips and the second semiconductor chips is disposed at a position closer to the first side than to the second side, while the semiconductor chip is disposed at a position closer to the second side than to the first side. Also, in the Y-direction, the resistive component, the second semiconductor chips, and the first semiconductor chips are arranged in order of increasing distance from the third side toward the fourth side, while the semiconductor chip is disposed at a position closer to the third side than to the fourth side.

98. 发明授权

EP2682987B1 Light emitting device package 有权转让
公开(公告)号：EP2682987B1
公开(公告)日：2018-04-04
申请号：EP13168598.4
申请日：2013-05-21
申请人： LG Innotek Co., Ltd.
发明人： Cho, Hyun Seok
IPC分类号： H01L25/075 , H01L33/62 , H01L23/544 , H01L33/60 , H01L23/00
CPC分类号： F21V19/0015 , H01L23/544 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/0753 , H01L33/60 , H01L33/62 , H01L2223/5442 , H01L2223/54426 , H01L2223/54486 , H01L2224/48091 , H01L2224/48137 , H01L2224/49109 , H01L2224/73265 , H01L2224/85122 , H01L2924/00014 , H01L2924/12035 , H01L2924/12041 , H01L2924/181 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： Disclosed is a light emitting device package including a reflective substrate including a chip mounting region, a circuit substrate disposed on the reflective substrate, the circuit substrate including an inside edge defining the chip mounting region and at least one aligning hole disposed at a position spaced from the inside edge, and at least one light emitting diode chip disposed in the chip mounting region, the at least one light emitting diode chip being connected to the circuit substrate through a wire.

99. 发明公开

EP3217428A1 SUBSTRAT UND MEHRERE DIESER UMFASSENDES MEHRFACHSUBSTRAT SOWIE VERFAHREN ZU DESSEN HERSTELLUNG 有权
标题翻译：该综合多基片的基片和多片及其制造方法
公开(公告)号：EP3217428A1
公开(公告)日：2017-09-13
申请号：EP16158942.9
申请日：2016-03-07
申请人： Infineon Technologies AG
发明人： Roth, Alexander
IPC分类号： H01L23/544 , H01L23/12 , H01L23/373 , H05K1/02
CPC分类号： H05K1/0306 , H01L23/12 , H01L23/544 , H01L2223/54413 , H01L2223/54426 , H01L2223/54433 , H01L2223/54486 , H05K1/0269 , H05K1/0284 , H05K3/06 , H05K3/4644 , H05K2201/09145 , H05K2201/0929 , H05K2201/09936 , H05K2203/107
摘要： Die Erfindung betrifft ein Substrat mit einer Keramikplatte oder Keramikschicht (21) und wenigstens einer an wenigstens einer Oberflächenseite der Keramikschicht (21) flächig befestigten Metallschicht (22), die an wenigstens einem Randbereich (23, 24, 25, 26) wenigstens eine Versenkung (27, 28, 29, 30) aufweist. Hierbei kodiert die wenigstens eine Versenkung (27, 28, 29, 30) im Randbereich (23, 24, 25, 26) eine Information.
Des Weiteren betrifft die Erfindung ein mehrere dieser Substrate umfassendes Mehrfachsubstrat sowie ein Verfahren zu dessen Herstellung.
摘要翻译：本发明涉及一种具有陶瓷板或陶瓷层（21）和所述陶瓷层中的至少一个的至少一个表面侧的基板（21）表面安装金属层（22）上的至少一个边缘区域（23，24，25，26）的至少一个埋头孔（ 27，28，29，30）。在此，边缘区域（23,24,25,26）中的至少一个埋头孔（27,28,29,30）编码信息。此外，本发明涉及包含几种这些基材的多重基材，并涉及其制备方法。

100. 发明公开

EP2979864A4 PROTECTIVE FILM FORMATION COMPOSITE SHEET, PROTECTIVE FILM-EQUIPPED CHIP, AND METHOD FOR FABRICATING PROTECTIVE FILM-EQUIPPED CHIP 有权
标题翻译：保护膜形成具有保护膜和方法复合箔片生产具有保护膜芯片
公开(公告)号：EP2979864A4
公开(公告)日：2016-11-02
申请号：EP14776342
申请日：2014-03-27
申请人： LINTEC CORP
发明人： YAMAMOTO DAISUKE , AZUMA YUICHIRO
IPC分类号： B32B27/20 , B32B27/00 , C08K3/38 , C09J7/02 , H01L21/301 , H01L21/683 , H01L23/00 , H01L23/29 , H01L23/31 , H01L23/544
CPC分类号： H01L23/3171 , B32B27/20 , B32B2307/302 , C08K2003/382 , C09J7/405 , C09J133/066 , C09J133/068 , C09J2203/326 , C09J2205/106 , C09J2433/00 , H01L21/6836 , H01L23/293 , H01L23/3164 , H01L23/544 , H01L2221/68327 , H01L2221/68377 , H01L2223/54486 , H01L2924/0002 , H01L2924/00 , C08F220/14 , C08F220/20 , C08F2220/325
摘要： There is provided a composite sheet for forming a protective film including: a pressure sensitive adhesive sheet having a pressure sensitive adhesive layer on a substrate; and a film for forming a protective film formed of a composition for forming a protective film on at least part of the pressure sensitive adhesive layer, wherein the composition for forming a protective film contains an inorganic filler (C) containing boron nitride particles (C1) and a content of the component (C) is 10 to 70 mass% relative to the total amount of the composition for forming a protective film. The composite sheet for forming a protective film exhibits the particular effects of making it possible to form a protective film with good heat dissipation properties and marking properties and to manufacture a highly reliable chip with protective film.
摘要翻译：提供了一种用于形成保护膜，其包括提供一种复合片材：具有在基片的压敏粘合剂层的压敏粘合片; 和用于形成形成的组合物的用于在压敏粘合剂层的至少一部分形成保护膜，worin所述组合物用于形成保护膜的保护膜的膜含有含氮化硼颗粒无机填料（C）（C1）和成分（C）的含量为10〜70％，相对于用于形成保护膜的组合物的总量的质量。用于形成保护膜的复合片材表现出使得能够形成具有良好的散热性和标记性的保护膜和制造具有保护膜的可靠性高的芯片的特殊效果。

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