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1. 发明授权

EP3062444B1 PHASE LOCKED LOOP HAVING FRACTIONAL VCO MODULATION 有权转让
公开(公告)号：EP3062444B1
公开(公告)日：2018-07-04
申请号：EP16155022.3
申请日：2016-02-10
申请人： NXP USA, Inc.
发明人： WAHEED, Khurram , TRAYLOR, Kevin B.
IPC分类号： H03L7/197 , H03C3/09
CPC分类号： H03L7/099 , H03B5/124 , H03B5/1265 , H03C3/00 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/0958 , H03C3/0975 , H03L7/081 , H03L7/197 , H03M3/422 , H03M7/165
摘要： An integrated circuit comprises a dual port modulator (24) and a voltage controlled oscillator (VCO) (16). The dual port modulator has a first input for receiving a transmitter modulation signal, a first output for providing a fractional portion of a high port modulation signal, a second output for providing a integer portion of the high port modulation signal, and a third output for providing a low port modulation signal. The VCO is coupled to the dual port modulator and has a first input for receiving the fractional portion of the high port modulation signal, a second input for receiving the integer portion of the high port modulation signal, a third input for receiving a tuning signal based on the low port modulation signal, and a first output for outputting an RF signal. The dual port modulator provides a signed single bit signal (s1) for generating the fractional portion of the high port modulation signal.

2. 发明公开

EP3249816A1 TIME-TO-DIGITAL CONVERTER IN PHASE-LOCKED LOOP 审中-公开
标题翻译：时间数字转换器在锁相环中的应用
公开(公告)号：EP3249816A1
公开(公告)日：2017-11-29
申请号：EP15886104.7
申请日：2015-11-27
申请人： Huawei Technologies Co., Ltd.
发明人： ZHOU, Shenghua , SONG, Ran
IPC分类号： H03L7/081
CPC分类号： H03L7/197 , G04F10/005 , H03L7/0818 , H03L7/085 , H03L7/095
摘要： The present invention discloses a time-to-digital converter in a phase-locked loop, so that phase locking accuracy can be improved. The time-to-digital converter includes a delay unit into which a first signal is input and a sampling unit into which a second signal is input, where the delay unit includes a first delay chain, a second delay chain, and a third delay chain that are connected in series in sequence, and is configured to delay the first signal, where the first delay chain includes at least one first delayer, the second delay chain includes at least three second delayers, the third delay chain includes at least one third delayer, and delay duration of the first delayer and delay duration of the third delayer are greater than delay duration of the second delayer; and the sampling unit is configured to: perform sampling on output signals of first delayers in the first delay chain, second delayers in the second delay chain, and third delayers in the third delay chain in the delay unit at a preset time point of the second signal, and output sampled signals.
摘要翻译：本发明公开了一种锁相环中的时间 - 数字转换器，从而可以提高锁相精度。时间数字转换器包括输入第一信号的延迟单元和输入第二信号的采样单元，其中延迟单元包括第一延迟链，第二延迟链和第三延迟链，其被配置为延迟第一信号，其中第一延迟链包括至少一个第一延迟器，第二延迟链包括至少三个第二延迟器，第三延迟链包括至少一个第三延迟器，所述第一延迟器的延迟时间和所述第三延迟器的延迟时间大于所述第二延迟器的延迟时间; 所述采样单元，用于对所述第二延迟链中的第一延迟链，所述第二延迟链中的第二延迟器以及所述延迟单元中第三延迟链中的第三延迟器的输出信号进行采样，信号，并输出采样信号。

3. 发明公开

EP2342825A4 HIGH SPEED PLL CLOCK MULTIPLIER 有权
标题翻译： SCHNELLER PLL-TAKTVERVIELFACHER
公开(公告)号：EP2342825A4
公开(公告)日：2016-06-22
申请号：EP09814946
申请日：2009-07-31
申请人： SYNOPSYS
发明人： MACHADO JOAQUIM J
IPC分类号： H03L7/087 , H03L7/089 , H03L7/095 , H03L7/10 , H03L7/197
CPC分类号： H03L7/10 , H03L7/0891 , H03L7/095 , H03L7/197
摘要： The present invention relates to a mixed mode electronic circuit that implements a PLL cell that employs an auto-range algorithm to lock to a wide range of input reference signals.
摘要翻译：本发明涉及一种混合模式电子电路，其实现采用自动量程算法锁定到宽范围的输入参考信号的PLL单元。

4. 发明授权

EP2474097B1 A HIGH-SPEED NON-INTEGER FREQUENCY DIVIDER CIRCUIT 有权
标题翻译：非整数HIGH-SPEED分频电路
公开(公告)号：EP2474097B1
公开(公告)日：2014-11-12
申请号：EP09849051.9
申请日：2009-09-02
申请人： Telefonaktiebolaget LM Ericsson (publ)
发明人： NYLÉN, Tomas , MALMCRONA, Adam
IPC分类号： H03K23/54 , H03K23/42 , H03K23/48 , H03K23/68 , H03L7/197 , H03K23/40
CPC分类号： H03L7/197 , H03K23/425 , H03K23/546

5. 发明公开

EP2474097A4 A HIGH-SPEED NON-INTEGER FREQUENCY DIVIDER CIRCUIT 有权
标题翻译：非整数HIGH-SPEED分频电路
公开(公告)号：EP2474097A4
公开(公告)日：2013-04-03
申请号：EP09849051
申请日：2009-09-02
申请人： ERICSSON TELEFON AB L M
发明人： NYLEN TOMAS , MALMCRONA ADAM
IPC分类号： H03K23/54 , H03K23/40 , H03K23/42 , H03K23/48 , H03K23/68 , H03L7/197
CPC分类号： H03L7/197 , H03K23/425 , H03K23/546

6. 发明公开

EP2517359A1 OSCILLATORS HAVING ARBITRARY FREQUENCIES AND RELATED SYSTEMS AND METHODS 有权转让
标题翻译：与WILKÜRLICHEN频率及相关系统和方法OSCILLATORS
公开(公告)号：EP2517359A1
公开(公告)日：2012-10-31
申请号：EP10840154.8
申请日：2010-12-23
申请人： Sand9, Inc.
发明人： SCHOEPF, Klaus, Juergen , REBEL, Reimund , KUYPERS, Jan, H.
IPC分类号： H03L1/02
CPC分类号： H03B5/30 , H03B5/32 , H03B19/00 , H03C3/095 , H03J7/065 , H03L7/0991 , H03L7/18 , H03L7/197 , H04B1/40
摘要： Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal.

7. 发明公开

EP2328272A1 SYNTHESIZER AND RECEPTION DEVICE AND ELECTRONIC DEVICE USING THE SAME 审中-公开
标题翻译：合成器SOWIE EMPFANGSVORRICHTUNG UND ELEKTRONISCHESGERÄTDAMIT
公开(公告)号：EP2328272A1
公开(公告)日：2011-06-01
申请号：EP09809539.1
申请日：2009-08-26
申请人： Panasonic Corporation
发明人： TSUKIO, Yasunobu , NAMBA, Akihiko
IPC分类号： H03L7/183 , H03L1/02 , H04B1/26
CPC分类号： H03L7/197 , H03J7/065 , H03L1/027
摘要： A synthesizer of the present invention includes: a synthesizer unit that outputs an oscillation signal based on a reference oscillation signal; a temperature detecting unit that detects a temperature; a time variation detecting unit that detects a time variation in frequency of the reference oscillation signal based on a result of temperature detection by the temperature detecting unit; and a control unit that adjusts a frequency of the oscillation signal outputted from the synthesizer unit based on a result of detection by the time variation detecting unit. With such a configuration, frequency compensation control is performed on a transducer having a large temperature coefficient.
摘要翻译：本发明的合成器包括：合成器单元，其基于参考振荡信号输出振荡信号; 温度检测单元，其检测温度; 时间变化检测单元，其基于温度检测单元的温度检测结果来检测基准振荡信号的频率的时间变化; 以及控制单元，其基于时间变化检测单元的检测结果来调整从合成器单元输出的振荡信号的频率。通过这样的结构，对具有大的温度系数的换能器进行频率补偿控制。

8. 发明授权

EP1647097B1 Transceiver architecture with reduced VCO-pulling sensitivity 失效
标题翻译：发射器/接收器架构具有降低VCO拉灵敏度
公开(公告)号：EP1647097B1
公开(公告)日：2009-12-30
申请号：EP04763145.2
申请日：2004-07-09
申请人： Ericsson Technology Licensing AB
发明人： EIKENBROEK, Johannes, Wilhelmus , VAN ZEIJL, Paulus, Thomas, Maria
IPC分类号： H04B1/30 , H04L27/36 , H03D7/18
CPC分类号： H03K23/68 , H03D7/165 , H03L7/18 , H03L7/197 , H04B1/30

9. 发明公开

EP1884019A2 FREQUENCY SYNTHESIZER WITH LOOP FILTER CALIBRATION FOR BANDWIDTH CONTROL 有权
标题翻译：频率合成SCHLEIFENFILTERKALIBRATION FOR带宽控制
公开(公告)号：EP1884019A2
公开(公告)日：2008-02-06
申请号：EP06739013.8
申请日：2006-03-17
申请人： Skyworks Solutions, Inc.
发明人： LEE, Chang-Hyeon , ALI, Akbar
IPC分类号： H03L7/00
CPC分类号： H03L7/093 , H03C3/0925 , H03C3/0933 , H03L7/07 , H03L7/0891 , H03L7/197 , H03L7/1976
摘要： According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

10. 发明授权

EP1073194B1 Spread spectrum clock generator and associated method 失效
标题翻译：与光谱色散和方法assoziertes时钟发生器
公开(公告)号：EP1073194B1
公开(公告)日：2007-06-27
申请号：EP00119532.0
申请日：1994-11-29
申请人： LEXMARK INTERNATIONAL, INC.
发明人： Hardin, Keith B. , Fessler, John T. , Bush, Donald Reid , Booth, James Ronald
IPC分类号： H03C3/09 , H03B29/00
CPC分类号： H03C3/0966 , H03B29/00 , H03C3/0925 , H03C3/0941 , H03L7/0805 , H03L7/197 , H04B2215/064 , H04B2215/067

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