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1. 发明授权

US06385392B1 Data processing apparatus and data processing method 有权
标题翻译：数据处理装置及数据处理方法
公开(公告)号：US06385392B1
公开(公告)日：2002-05-07
申请号：US09254750
申请日：1999-05-06
申请人： Takeshi Makita , Satoshi Maeda
发明人： Takeshi Makita , Satoshi Maeda
IPC分类号： H04N5911
CPC分类号： G06F11/1088 , G06F11/1076 , H04N21/2326
摘要： When data including video and/or audio data is dispersed into data each having a predetermined unit and recorded in a non-linear accessible recording medium, or reproducing data dispersed and recorded, in case that the status information is not output in a predetermined period, it is decided that an error occurred to perform an error processing. Also, when data including video and/or audio data is dispersed into data each having a predetermined unit and recorded in a non-linear accessible recording medium with a redundancy, in case that an error occurred, which can be corrected within the redundancy, the fault information is recorded and the data is restored immediately by using the redundancy when the data of which an error occurred is reproduced based on the fault information.
摘要翻译：当包括视频和/或音频数据的数据被分散到每个具有预定单元并被记录在非线性可访问记录介质中的数据或者再现数据被分散和记录时，在状态信息不在预定时间段内输出的情况下，决定执行错误处理时发生错误。此外，当包括视频和/或音频数据的数据被分散成具有预定单元的数据并被记录在具有冗余度的非线性可访问记录介质中时，在发生错误的情况下，其可以在冗余内被校正，记录故障信息，并且根据故障信息再现发生错误的数据时，通过使用冗余来立即恢复数据。

2. 发明授权

US06633724B1 Realtime data recording method 失效
标题翻译：实时数据记录方式
公开(公告)号：US06633724B1
公开(公告)日：2003-10-14
申请号：US09257494
申请日：1999-02-25
申请人： Tsukasa Hasegawa , Masahiro Kageyama , Tamotsu Ito
发明人： Tsukasa Hasegawa , Masahiro Kageyama , Tamotsu Ito
IPC分类号： H04N5911
CPC分类号： H04N9/8042 , G11B27/11 , G11B27/329 , G11B27/36 , G11B2220/20 , G11B2220/65 , H04N5/85
摘要： A realtime data recording method allows recovery of recorded file data upon occurrence of a fault, for use as a readable file. Prior to recording, initial management data are generated such that the entire area on a recording medium 1 is reflected as a recording range. After the initial management data has been recorded, data recording is started. During the recording, a writing status of the recording medium (or apparatus) is set as in-writing status, and realtime sector information generated in parallel to data recording is recorded in a non-volatile memory for management of a recording status. Upon restarting after a recording fault, the in-writing status of the recording medium 1 is read to see if the medium has been set open, and inconsistency between the recording information of the sector information and the in-writing status recording information is detected. Correct management data is recorded and re-recorded onto the recording medium.
摘要翻译：实时数据记录方法允许在发生故障时恢复记录的文件数据，以用作可读文件。在记录之前，生成初始管理数据，使得记录介质 1 上的整个区域被反映为记录范围。在记录初始管理数据之后，开始数据记录。在记录期间，记录介质（或设备）的写入状态被设置为写入状态，并且与数据记录并行产生的实时扇区信息被记录在用于管理记录状态的非易失性存储器中。在记录故障后重新启动时，读取记录介质 1 的写入状态，以查看介质是否已经打开，并且记录信息的记录信息不一致扇区信息和写入状态记录信息被检测。正确的管理数据被记录并重新记录到记录介质上。

3. 发明授权

US06374038B1 Tape recording of video signals 失效
公开(公告)号：US06374038B1
公开(公告)日：2002-04-16
申请号：US08831616
申请日：1997-04-09
申请人： Martin Rex Dorricott , Simon Chandler , Paul Michael McHugh
发明人： Martin Rex Dorricott , Simon Chandler , Paul Michael McHugh
IPC分类号： H04N5911
摘要： A digital tape recorder comprises means for recording video material onto video sections of a digital tape; and means for recording digital cataloguing data corresponding to the video material onto cataloguing data sections longitudinally interspersed between video sections on the digital tape.

4. 发明授权

US06625390B1 Apparatus and method for recording and reproducing data, and AV server 有权
标题翻译：用于记录和再现数据的装置和方法，以及AV服务器
公开(公告)号：US06625390B1
公开(公告)日：2003-09-23
申请号：US09355470
申请日：1999-08-30
申请人： Norikazu Ito , Satoshi Yoneya , Masakazu Yoshimoto , Satoshi Katsuo , Jun Yoshikawa , Satoshi Yutani , Koichi Sato , Tomohisa Shiga , Hiroyuki Fujita , Masaki Hirose
发明人： Norikazu Ito , Satoshi Yoneya , Masakazu Yoshimoto , Satoshi Katsuo , Jun Yoshikawa , Satoshi Yutani , Koichi Sato , Tomohisa Shiga , Hiroyuki Fujita , Masaki Hirose
IPC分类号： H04N5911
CPC分类号： G06F11/1076 , G06F2211/1016 , G06F2211/1057
摘要： A data recording and reproducing apparatus (11) which generates a plurality of divided data through dividing input data D1 using a distributor (22) if recording data, while generating redundancy-code data P1 and P2 using Read-Solomon-code data which can perform error-correcting on a plurality of divided data, and records the divided data and the redundancy-code data P1, P2 on HDDs 211 to 21K, 281 and 28Z. The data recording and reproducing apparatus (11) reproduces the divided data and the redundancy-code data from the HDDs 211 to 21K, 281 and 28Z, performs error-correcting processing on the divided data based on the redundancy-code data by an error corrector (31), and outputs the divided data which have been error-corrected after multiplying the divided data by a data multiplier (32) if reproducing data.
摘要翻译：一种数据记录和再现装置（11），其通过使用分配器（22）分割输入数据D1来生成多个分割数据，如果记录数据，同时使用可以执行的Read-Solomon码数据产生冗余码数据P1和P2 在多个分割数据上进行纠错，并将分割数据和冗余码数据P1，P2记录在HDD 211〜21K，281和28Z上。数据记录和再现装置（11）从HDD 211至21K，281和28Z再现划分的数据和冗余码数据，基于冗余码数据由误差校正器执行对划分的数据的纠错处理（31），并且如果再现数据，则将经分频数据乘以数据乘法器（32）之后经过纠错的分割数据。

5. 发明授权

US06330394B1 Recording and playing-back device for use in a disk and method of carrying out recording and playing-back 有权
标题翻译：用于磁盘的记录和回放设备以及执行记录和播放的方法
公开(公告)号：US06330394B1
公开(公告)日：2001-12-11
申请号：US09300430
申请日：1999-04-28
申请人： Satoshi Itoi
发明人： Satoshi Itoi
IPC分类号： H04N5911
CPC分类号： G11B27/3027 , G11B27/034 , G11B27/036 , G11B27/10 , G11B27/105 , G11B2220/216 , G11B2220/2525 , G11B2220/2562 , G11B2220/2575 , H04N5/85 , H04N9/8042
摘要： A signal subjected to compression coding and multiplexing by a video/audio coding circuit is subjected to signal processing such as shuffling by a recording signal processing circuit. A control ECC block generated by a control ECC block attaching circuit is multiplexed with video/audio data to be recorded on a disk. Data played back from the disk is subjected to processing such as deshuffling by a play-back signal processing circuit. The control ECC block is played back by a control ECC block playing-back circuit. Video/audio data is decoded by a video/audio decoding circuit to be output.
摘要翻译：由视频/音频编码电路进行压缩编码和复用的信号经受诸如由记录信号处理电路进行混洗的信号处理。由控制ECC块附接电路产生的控制ECC块与要记录在盘上的视频/音频数据多路复用。从盘回放的数据经过回放信号处理电路进行去混洗等处理。控制ECC块由控制ECC块回放电路回放。视频/音频数据由视频/音频解码电路解码以输出。

6. 发明授权

US06330391B1 VTR signal processing circuit 失效
标题翻译： VTR信号处理电路
公开(公告)号：US06330391B1
公开(公告)日：2001-12-11
申请号：US09037305
申请日：1998-03-09
申请人： Takashi Kurihara , Yoshihisa Ichikawa , Izumi Arai , Naoki Kurabayashi , Hiroshi Kuramoto , Tsuyoshi Muroya
发明人： Takashi Kurihara , Yoshihisa Ichikawa , Izumi Arai , Naoki Kurabayashi , Hiroshi Kuramoto , Tsuyoshi Muroya
IPC分类号： H04N5911
CPC分类号： H04N9/83 , H04N9/7917 , H04N9/793 , H04N9/84
摘要： In a VTR signal processing circuit, a first reproduced color under signal and a second reproduced color under signal obtained by delaying by one or two horizontal period in synchronism with a predetermined clock signal are supplied to the first and second frequency converter circuits 1 and 2 respectively, a frequency signal having frequency 2n times that of a carrier used in frequency conversion for converting a frequency of the reproduced color under signal into a frequency corresponding to a standard color signal is produced by an oscillator circuit, this oscillation frequency is divided such that it becomes the above mentioned carrier frequency, four carriers having phases 0 degree, 90 degrees, 180 degrees, and 270 degrees respectively are produced, the four carriers are selectively output and supplied to the first and second frequency converter circuits 1 and 2 such that an output signal of the first frequency converter circuit 1 and an output signal of the second frequency converter circuit 2 become in phase or inverted phase, and a color cross-talk between tracks is removed by adding the both output signals or subtracting one of the output signals from the other, the clock generator circuit 22 for generating a clock signal in synchronism with a horizontal sync signal separated from a reproduced luminance signal is provided and the delaying operation of the delay circuit is controlled by this clock signal.
摘要翻译：在VTR信号处理电路中，分别通过与预定时钟信号同步延迟一个或两个水平周期而获得的信号下的第一再现颜色和第二再现颜色分别提供给第一和第二频率转换器电路1和2 通过振荡电路产生频率为频率2n倍的频率信号的频率信号，该频率信号用于将频率转换中的再现颜色的频率转换为对应于标准色彩信号的频率的频率的频率，该振荡频率被分割为成为上述载波频率，分别产生了相位为0度，90度，180度和270度的四个载波，四个载波被选择性地输出并提供给第一和第二频率转换器电路1和2，使得输出第一频率转换器电路1的信号和第二频率转换的输出信号呃电路2变成同相或反相，并且通过将两个输出信号相加或从另一个输出信号中减去一个输出信号来消除磁道之间的色彩串扰，时钟发生器电路22用于与提供与再现的亮度信号分离的水平同步信号，并且延迟电路的延迟操作由该时钟信号控制。

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