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1. 发明授权

US06384648B1 Radio frequency data communications device 有权
公开(公告)号：US06384648B1
公开(公告)日：2002-05-07
申请号：US09550647
申请日：2000-04-14
申请人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , David K. Ovard , Shu-Sun Yu , Robert R. Rotzoll
发明人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , David K. Ovard , Shu-Sun Yu , Robert R. Rotzoll
IPC分类号： H03L7099
CPC分类号： G06K19/0716 , G06K7/0008 , G06K7/10059 , G06K19/0707 , G06K19/0712 , G06K19/0723 , G06K19/0726 , G06K19/07749 , G06K19/07758 , G06K2017/0051 , H01Q1/2225 , H03L7/0995 , H03L7/148
摘要： A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

2. 发明授权

US06707342B1 Multiple-VCO tuning 有权
标题翻译：多VCO调谐
公开(公告)号：US06707342B1
公开(公告)日：2004-03-16
申请号：US10114182
申请日：2002-04-02
申请人： Jeffrey M. Zachan , Jackie Cheng , Alyosha C. Molnar
发明人： Jeffrey M. Zachan , Jackie Cheng , Alyosha C. Molnar
IPC分类号： H03L7099
CPC分类号： H03L7/10 , H03L7/099 , H03L7/18 , Y10S331/02
摘要： A tuning circuit for use in tuning multiple voltage-controlled oscillators (VCOs) of a phase-locked loop (PLL) is provided. A search algorithm is used to determine which VCO to use for a given frequency to be synthesized by the PLL. The tuning circuit provides a binary representation, associated with the frequency to synthesize, to the PLL. The PLL responds to this representation by attempting to synthesize the associated frequency. New binary representations are provided until an indication of a threshold frequency between multiple VCOs is determined. A record of the threshold frequency is stored. The binary representation of a frequency to be synthesized and the stored record of the threshold frequency are used to provide an indication of which VCO of the PLL to use to synthesize the desired frequency.
摘要翻译：提供了用于调谐锁相环（PLL）的多个压控振荡器（VCO）的调谐电路。搜索算法用于确定要由PLL合成给定频率的哪个VCO。调谐电路提供与PLL频率合成的二进制表示。 PLL通过尝试合成相关频率来响应该表示。提供新的二进制表示，直到确定多个VCO之间的阈值频率的指示。存储阈值频率的记录。将要合成的频率的二进制表示和阈值频率的存储记录用于提供用于合成所需频率的PLL的哪个VCO的指示。

3. 发明授权

US06426680B1 System and method for narrow band PLL tuning 有权
标题翻译：具有改进的调谐范围超过过程和温度变化的集成VCO
公开(公告)号：US06426680B1
公开(公告)日：2002-07-30
申请号：US09580014
申请日：2000-05-26
申请人： Ralph Duncan , Tom W. Kwan
发明人： Ralph Duncan , Tom W. Kwan
IPC分类号： H03L7099
CPC分类号： H03L7/23 , H01F17/0006 , H01F17/0013 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/08 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H03B5/1209 , H03B5/1212 , H03B5/1228 , H03B5/1253 , H03B5/364 , H03B2200/0038 , H03B2201/025 , H03B2201/0266 , H03D7/161 , H03D7/18 , H03G1/0029 , H03H11/1291 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L1/023 , H03L7/10 , H01L2924/00
摘要： An integrated VCO having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning control circuit responsive to a VCO state variable that is disposed upon the substrate, and a VCO disposed upon the substrate, having a tuning control voltage input falling within a VCO tuning range for adjusting a VCO frequency output, and having its tuning range adjusted by the tuning control circuit in response to the VCO state variable.
摘要翻译：具有改进的调谐范围超过过程和温度变化的集成VCO。因此，在本发明的本实施例中提供了集成VCO。 VCO包括：衬底，响应于设置在衬底上的VCO状态变量的VCO调谐控制电路，以及设置在衬底上的VCO，具有落在VCO调谐范围内的调谐控制电压输入，用于调节VCO频率输出，并且其调谐范围由调谐控制电路响应于VCO状态变量而调整。

4. 发明授权

US06407641B1 Auto-locking oscillator for data communications 有权
标题翻译：用于数据通信的自动锁定振荡器
公开(公告)号：US06407641B1
公开(公告)日：2002-06-18
申请号：US09511019
申请日：2000-02-23
申请人： Timothy J. Williams , Jeffrey D. Wick
发明人： Timothy J. Williams , Jeffrey D. Wick
IPC分类号： H03L7099
CPC分类号： H03L7/099 , H03L7/085 , H03L2207/06 , H04L7/0004 , H04L7/046
摘要： A method for tuning the frequency of oscillation of a clock signal, comprising the steps of (A) analyzing the rate of an incoming data stream to generate one or more control signals and (B) adjusting said frequency of oscillation in response to said one or more control signals.
摘要翻译：一种用于调整时钟信号的振荡频率的方法，包括以下步骤：（A）分析输入数据流的速率以产生一个或多个控制信号，以及（B）响应于所述一个或多个控制信号调整所述振荡频率更多的控制信号。

5. 发明授权

US06388533B1 Programmable ring oscillator 有权
公开(公告)号：US06388533B1
公开(公告)日：2002-05-14
申请号：US09741645
申请日：2000-12-19
申请人： Gary L. Swoboda
发明人： Gary L. Swoboda
IPC分类号： H03L7099
摘要： A controllable ring oscillator clock circuit includes a plurality of ring oscillator stages disposed in a linear chain. Each stage has a latch that determines if this stage is the last stage in the ring. In a propagate state of the latch the ring pulse is sent to the next stage. In a return state of the latch the ring pulse is returned to the prior stage. The latches are programmed like a shift register. A more command transfers the propagate state to the next stage. This increases the length of the delay line and thus decreases the oscillator frequency. A less command transfers the return state to the prior state, decreasing the ring delay and increasing the oscillator frequency. In the preferred embodiment the delay stages are deployed as even and odd pairs with only the even or the odd stages changed at one time. This enables a simple structure because the pairs operate like a master-slave flip-flop, that is the data can move only a single stage at a time.

6. 发明授权

US06275116B1 Method, circuit and/or architecture to improve the frequency range of a voltage controlled oscillator 有权
标题翻译：提高压控振荡器频率范围的方法，电路和/或结构
公开(公告)号：US06275116B1
公开(公告)日：2001-08-14
申请号：US09328083
申请日：1999-06-08
申请人： Khaldoon Abugharbieh , Sung-Ki Min
发明人： Khaldoon Abugharbieh , Sung-Ki Min
IPC分类号： H03L7099
CPC分类号： H03L7/099 , H03L2207/06
摘要： A circuit comprising an oscillator configured to generate a periodic signal in response to (i) control signal and (ii) a current. The current may be varied independently of the control signal. In one example, the oscillator may generate the periodic signal in further response to a second current that may vary in response to the control signal. In another example, the oscillator may be used in a phase-locked loop circuit.
摘要翻译：一种电路，包括响应于（i）控制信号和（ii）电流而产生周期性信号的振荡器。电流可以独立于控制信号而变化。在一个示例中，振荡器可以进一步响应于可响应于控制信号而变化的第二电流产生周期信号。在另一示例中，振荡器可以用在锁相环电路中。

7. 发明授权

US06222422B1 Method and apparatus for generating a symmetrical output signal from a non-symmetrical input 失效
标题翻译：用于从非对称输入产生对称输出信号的方法和装置
公开(公告)号：US06222422B1
公开(公告)日：2001-04-24
申请号：US09385916
申请日：1999-08-30
申请人： Ion E. Opris
发明人： Ion E. Opris
IPC分类号： H03L7099
CPC分类号： H03L7/099 , H03K5/151 , H03K5/1565
摘要： A method of generating a symmetrical output signal with a 50% duty cycle. The symmetrical output signal is generated without the need for the input signal to be at twice the frequency of the output signal. By utilizing the differential output of a circuit and cross-coupling this to the inputs of comparators a series of outputs are obtained. These outputs are then used to control a latch device by utilizing only a single edge. Because only a single edge is used to control the low to high and high to low transition, the delay is a fixed constant and the resulting output is a symmetrical output signal with a 50% duty cycle.
摘要翻译：一种产生具有50％占空比的对称输出信号的方法。产生对称的输出信号，而不需要输入信号为输出信号频率的两倍。通过利用电路的差分输出并将其交叉耦合到比较器的输入端，获得一系列输出。这些输出然后用于仅利用单个边缘来控制锁存器件。由于仅使用单个边沿来控制从低到高和高到低的转换，所以延迟是固定常数，所得到的输出是占空比为50％的对称输出信号。

8. 发明授权

US06466098B2 Analogue-controlled phase interpolator 有权
标题翻译：模拟控制相位内插器
公开(公告)号：US06466098B2
公开(公告)日：2002-10-15
申请号：US09792202
申请日：2001-02-23
申请人： Andrew Pickering
发明人： Andrew Pickering
IPC分类号： H03L7099
CPC分类号： H03L7/089 , H03L7/0998
摘要： Apparatus for generating an oscillating signal in a desired phase relationship with an input signal, including a mixer arranged to receive a pair of reference signals oscillating at a common frequency and having a phase offset between them, and to mix the reference signals in variable proportions according to the value of input weighting signals to generate an output signal. A comparator is to compare the phase of the output signal with that of the input signal to determine whether the signals are in the desired phase relationship and, if not, to output one or more control signals indicative of the required adjustment in the phase of the output signal to achieve the desired phase relationship. An adjustable ring oscillator including a plurality of stages is connected in a ring and arranged to propagate oscillations around the ring. The ring oscillator is responsive to one or more control signals to propagate the oscillations in first and second directions around the ring and is arranged to provide the weighting signals to the mixer from outputs of ones of its stages.
摘要翻译：用于产生与输入信号期望的相位关系的振荡信号的装置，包括混频器，该混频器布置成接收以公共频率振荡并且在它们之间具有相位偏移的一对参考信号，并且按照可变比例混合参考信号到输入加权信号的值以产生输出信号。比较器将输出信号的相位与输入信号的相位进行比较，以确定信号是否处于所需的相位关系，如果不是，则输出一个或多个控制信号，该控制信号表示在输出信号达到所需的相位关系。包括多个级的可调节环形振荡器被连接在一个环中并且布置成传播围绕环的振荡。环形振荡器响应于一个或多个控制信号以围绕环传播在第一和第二方向上的振荡，并且被布置为根据其级中的一个的输出将加权信号提供给混合器。

9. 发明授权

US06459342B1 System and method for controlling an oscillator 有权
标题翻译：用于控制振荡器的系统和方法
公开(公告)号：US06459342B1
公开(公告)日：2002-10-01
申请号：US09727059
申请日：2000-11-30
申请人： Stanley J. Goldman
发明人： Stanley J. Goldman
IPC分类号： H03L7099
CPC分类号： H03L7/099
摘要： An oscillator controls the frequency of an output clock signal in response to detecting an error in the frequency of an input clock signal. The oscillator includes an inverter operable to generate a voltage signal and a resonator coupled to the inverter operable to introduce a phase shift in the voltage signal. The oscillator also includes a variable resistor positioned across a feedback path of the inverter and operable to introduce a further phase shift in the voltage signal in response to the detected error. The resonator is further operable to adjust the frequency of the voltage signal in response to the introduced further phase shift. The voltage signal is used as the output clock signal.
摘要翻译：响应于检测到输入时钟信号的频率的误差，振荡器控制输出时钟信号的频率。振荡器包括可操作以产生电压信号的反相器和耦合到反相器的谐振器，其可操作以在电压信号中引入相移。振荡器还包括位于反相器的反馈路径上的可变电阻器，可操作以响应于检测到的误差而在电压信号中引入进一步的相移。谐振器还可操作以响应于引入的进一步的相移来调整电压信号的频率。电压信号用作输出时钟信号。

10. 发明授权

US06452458B1 Voltage-controlled oscillator 失效
标题翻译：压控振荡器
公开(公告)号：US06452458B1
公开(公告)日：2002-09-17
申请号：US09558062
申请日：2000-04-26
申请人： Susumu Tanimoto
发明人： Susumu Tanimoto
IPC分类号： H03L7099
CPC分类号： H03K3/0322 , H03K3/0231 , H03K3/03 , H03L7/0995
摘要： A voltage-controlled oscillator 3 is constructed with a ring oscillator control circuit 2 and a ring oscillator 1, which is constructed with a plurality of differential amplifiers 5 to 8 each including a differential pair of transistors 24 and 25 and load circuits 22 and 23 connected to the respective transistors. The load circuits 22 and 23 are constructed such that the differential amplifiers always operate in linear region according to load drive voltages CL1 and CL2.
摘要翻译：压控振荡器3由环形振荡器控制电路2和环形振荡器1构成，环形振荡器1由多个差分放大器5至8构成，差分放大器5至8分别包括晶体管24和25的差分对以及连接的负载电路22和23 到相应的晶体管。负载电路22和23被构造成使得差分放大器总是根据负载驱动电压CL1和CL2在线性区域中操作。

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