专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06660640B1 Process for planarizing patterned metal structures for magnetic thin film heads 失效
标题翻译：用于平面化用于磁性薄膜头的图案化金属结构的方法
公开(公告)号：US06660640B1
公开(公告)日：2003-12-09
申请号：US09614062
申请日：2000-07-11
申请人： Robert Dennis Miller , Alfred Floyd Renaldo , Willi Volksen , Howard Gordon Zolla
发明人： Robert Dennis Miller , Alfred Floyd Renaldo , Willi Volksen , Howard Gordon Zolla
IPC分类号： H01L21463
CPC分类号： G11B5/3106 , G11B5/3116 , G11B5/3163
摘要： A process for planarizing a patterned metal structure for a magnetic thin film head includes the steps of applying an encapsulation/planarizing material on a substrate, spinning the substrate in a photoresist spinner or similar machine, curing the encapsulation/planarizing layer by energetic particles such as an electron beam. The planarizing process further comprises the step of polishing the entire structure using a conventional chemical-mechanical polishing step. The curing step takes place at the substrate temperature less than 200° C., which prevents the damages of the thin film head structures such as MR and GMR sensors. This process is cheap, efficient and easy to apply.
摘要翻译：用于平坦化用于磁性薄膜头的图案化金属结构的方法包括以下步骤：在衬底上施加封装/平面化材料，将衬底旋转在光致抗蚀剂旋涂器或类似机器中，通过高能粒子固化封装/平坦化层，例如电子束。平面化处理还包括使用常规化学机械抛光步骤对整个结构进行抛光的步骤。固化步骤在低于200℃的基板温度下进行，这防止了诸如MR和GMR传感器的薄膜头结构的损坏。这个过程便宜，高效，易于应用。

2. 发明授权

US06461978B1 Method of manufacturing a substrate for an electronic device by using etchant and electronic device having the substrate 有权
标题翻译：通过使用具有基板的蚀刻剂和电子器件制造电子器件用基板的方法
公开(公告)号：US06461978B1
公开(公告)日：2002-10-08
申请号：US09422983
申请日：1999-10-22
申请人： Gyoo Chul Jo
发明人： Gyoo Chul Jo
IPC分类号： H01L21463
CPC分类号： H01L29/66765 , C23F1/02 , C23F1/20 , H01L21/32134
摘要： In the case that a stacked layer, in which another metal layer is stacked on an Al layer or Al alloy layer having a low resistance, is used as a wiring material, an etchant is provided which can etch to a substantially equal etching rate by executing only one etching on the each metal layer composing the stacked layer. A method of manufacturing a substrate for an electronic device uses the etchant, producing an electronic device having the substrate. In order to achieve the object, the etchant has fluoric acid, periodic acid and sulfuric acid wherein the total weight ratio of the fluoric acid and periodic acid is 0.05˜30 wt %, the weight ratio of the sulfuric acid is 0.05˜20 wt %, the weight ratio of periodic acid to fluoric acid is 0.01˜2 wt %. Also each layer of wiring(5,12,14) formed by stacking Al layer or Al alloy layer and Ti layer or Ti alloy layer can be uniformly etched to substantially equal etching rate by the etchant.
摘要翻译：在将层叠有Al层或Al电阻较低的Al合金层的堆叠层用作布线材料的情况下，可以通过执行蚀刻剂，蚀刻到基本相同的蚀刻速度在构成堆叠层的每个金属层上仅进行一次蚀刻。电子装置用基板的制造方法使用蚀刻剂，制造具有基板的电子装置。为了达到上述目的，蚀刻剂具有氟酸，高碘酸和硫酸，其中氟酸和高碘酸为0.05〜30重量％，硫酸重量比为0.05〜20重量％，高碘酸与氟酸的重量比为0.01〜2重量％。此外，通过层叠Al层或Al合金层和Ti层或Ti合金层形成的每层布线（5,12,14）也可以被均匀地蚀刻，从而蚀刻剂的蚀刻速率基本相等。

3. 发明授权

US06398937B1 Ultrasonically assisted plating bath for vias metallization in printed circuit board manufacturing 失效
标题翻译：超声波辅助电镀槽用于印刷电路板制造中的通孔金属化
公开(公告)号：US06398937B1
公开(公告)日：2002-06-04
申请号：US09653798
申请日：2000-09-01
申请人： Richard Menini , Joel Fournier
发明人： Richard Menini , Joel Fournier
IPC分类号： H01L21463
CPC分类号： H05K3/423 , C25D5/20 , H05K3/0088 , H05K2201/09509 , H05K2203/0285 , H05K2203/081 , H05K2203/1545
摘要： A method and apparatus for enhancing the microthrowing power in a plating bath. The method involves the use of ultrasonic vibration of an electrochemical solution to increase the uniformity of copper deposition for blind hole vias. The apparatus includes a series of ultrasonic transducers positioned between anodes for vibration of the solution being electro deposited on the cathode.
摘要翻译：一种用于增强镀浴中的微量投射功率的方法和装置。该方法涉及使用电化学溶液的超声波振动来增加盲孔通孔中铜沉积的均匀性。该装置包括位于阳极之间的一系列超声换能器，用于电解沉积在阴极上的溶液的振动。

4. 发明授权

US06682628B2 Methods and apparatuses for monitoring and controlling mechanical or chemical-mechanical planarization of microelectronic substrate assemblies 有权
标题翻译：用于监测和控制微电子衬底组件的机械或化学机械平面化的方法和装置
公开(公告)号：US06682628B2
公开(公告)日：2004-01-27
申请号：US10139299
申请日：2002-05-02
申请人： James J. Hoffmann , Gundu M. Sabde , Stephen J. Kramer , Michael James Joslyn
发明人： James J. Hoffmann , Gundu M. Sabde , Stephen J. Kramer , Michael James Joslyn
IPC分类号： H01L21463
CPC分类号： B24B37/013 , B24B37/042 , B24B49/16 , H01L21/30625
摘要： Methods and apparatuses for mechanical and/or chemical-mechanical planarization of semiconductor wafers, field emission displays and other microelectronic substrate assemblies. One method of planarizing a microelectronic substrate assembly in accordance with the invention includes pressing a substrate assembly against a planarizing surface of a polishing pad at a pad/substrate interface defined by a surface area of the substrate assembly contacting the planarizing surface. The method continues by moving the substrate assembly and/or the polishing pad with respect to the other to rub at least one of the substrate assembly and the planarizing surface against the other at a relative velocity. As the substrate assembly and polishing pad rub against each other, a parameter indicative of drag force between the substrate assembly and the polishing pad is measured or sensed at periodic intervals. The measured drag force can be used to generate a plot of work versus time. The work versus time plot is then integrated to determine an estimated work exerted at the pad/substrate interface. The planarizing process is terminated when the estimated thickness is at least approximately within a range of desired substrate assembly thickness for endpointing the substrate assembly according to a predetermined relationship between work and substrate assembly thickness.
摘要翻译：用于半导体晶片，场发射显示器和其它微电子衬底组件的机械和/或化学机械平面化的方法和装置。根据本发明的平面化微电子衬底组件的一种方法包括在由与平坦化表面接触的衬底组件的表面区域限定的焊盘/衬底界面处将衬底组件压靠在抛光垫的平坦化表面上。该方法通过相对于另一个移动衬底组件和/或抛光垫而以相对速度摩擦衬底组件和平坦化表面中的至少一个来抵抗另一个。当衬底组合件和抛光垫彼此摩擦时，以周期性间隔测量或感测指示衬底组件和抛光垫之间的牵引力的参数。测量的拖曳力可用于产生工作与时间的关系。然后将工作与时间图集成以确定在衬垫/衬底界面处施加的估计工作。当估计的厚度至少大约在用于根据工件和衬底组件厚度之间的预定关系来终止衬底组件的所需衬底组件厚度的范围内时，平坦化过程终止。

5. 发明授权

US06465330B1 Method for grinding a wafer back 有权
标题翻译：磨削晶圆的方法
公开(公告)号：US06465330B1
公开(公告)日：2002-10-15
申请号：US09387705
申请日：1999-08-18
申请人： Kazuhiro Takahashi , Kazuyoshi Ebe , Shinya Takyu
发明人： Kazuhiro Takahashi , Kazuyoshi Ebe , Shinya Takyu
IPC分类号： H01L21463
CPC分类号： H01L21/6835 , B24B37/04 , C08L33/06 , C09J7/22 , C09J7/243 , C09J7/38 , C09J2201/122 , C09J2201/606 , C09J2203/326 , C09J2423/006 , C09J2433/00 , H01L21/6836 , H01L2221/68327 , H01L2221/6834 , Y10T428/28 , Y10T428/2809
摘要： A surface protective sheet for semiconductor wafer, used in wafer back grinding during a process comprising (1) forming grooves on the surface a of semiconductor wafer furnished with a circuit so that the cutting depth of the grooves are smaller than the thickness of the wafer and (2) grinding the back of the wafer so that the thickness of the wafer is reduced and that the wafer is finally divided into individual chips. The above surface protective sheet is comprised of a substrate and, superimposed thereon, a pressure sensitive adhesive layer having an elastic modulus of at least 1.0×105 Pa at 40° C. This surface protective sheet is applicable to a process which enables producing extremely thin IC chips with high yield.
摘要翻译：一种用于半导体晶片的表面保护片，用于在工艺中的晶片背面研磨中，包括：（1）在具有电路的半导体晶片的表面a上形成凹槽，使得沟槽的切割深度小于晶片的厚度，（2）磨削晶片的背面，使得晶片的厚度减小，并且晶片最终分成单独的芯片。上述表面保护片由基材构成，在其上叠加有在40℃下弹性模量为至少1.0×10 5 Pa的压敏粘合剂层。该表面保护片适用于能够制造极薄的IC 芯片产量高。

6. 发明授权

US06464824B1 Methods and apparatuses for monitoring and controlling mechanical or chemical-mechanical planarization of microelectronic substrate assemblies 有权
标题翻译：用于监测和控制微电子衬底组件的机械或化学机械平面化的方法和装置
公开(公告)号：US06464824B1
公开(公告)日：2002-10-15
申请号：US09386648
申请日：1999-08-31
申请人： James J. Hofmann , Gundu M. Sabde , Stephen J. Kramer , Michael James Joslyn
发明人： James J. Hofmann , Gundu M. Sabde , Stephen J. Kramer , Michael James Joslyn
IPC分类号： H01L21463
CPC分类号： B24B37/013 , B24B37/042 , B24B49/16 , H01L21/30625
摘要： Methods and apparatuses for mechanical and/or chemical-mechanical planarization of semiconductor wafers, field emission displays and other microelectronic substrate assemblies. One method of planarizing a microelectronic substrate assembly in accordance with the invention includes pressing a substrate assembly against a planarizing surface of a polishing pad at a pad/substrate interface defined by a surface area of the substrate assembly contacting the planarizing surface. The method continues by moving the substrate assembly and/or the polishing pad with respect to the other to rub at least one of the substrate assembly and the planarizing surface against the other at a relative velocity. As the substrate assembly and polishing pad rub against each other, a parameter indicative of drag force between the substrate assembly and the polishing pad is measured or sensed at periodic intervals. The measured drag force can be used to generate a plot of work versus time. The work versus time plot is then integrated to determine an estimated work exerted at the pad/substrate interface. The planarizing process is terminated when the estimated thickness is at least approximately within a range of desired substrate assembly thickness for endpointing the substrate assembly according to a predetermined relationship between work and substrate assembly thickness.
摘要翻译：用于半导体晶片，场发射显示器和其它微电子衬底组件的机械和/或化学机械平面化的方法和装置。根据本发明的平面化微电子衬底组件的一种方法包括在由与平坦化表面接触的衬底组件的表面区域限定的焊盘/衬底界面处将衬底组件压靠在抛光垫的平坦化表面上。该方法通过相对于另一个移动衬底组件和/或抛光垫而以相对速度摩擦衬底组件和平坦化表面中的至少一个来抵抗另一个。当衬底组合件和抛光垫彼此摩擦时，以周期性间隔测量或感测指示衬底组件和抛光垫之间的牵引力的参数。测量的拖曳力可用于产生工作与时间的关系。然后将工作与时间图集成以确定在衬垫/衬底界面处施加的估计工作。当估计的厚度至少大约在用于根据工件和衬底组件厚度之间的预定关系来终止衬底组件的所需衬底组件厚度的范围内时，平坦化过程终止。

7. 发明授权

US06436302B1 Post CU CMP polishing for reduced defects 失效
标题翻译：后CU CMP抛光减少缺陷
公开(公告)号：US06436302B1
公开(公告)日：2002-08-20
申请号：US09492267
申请日：2000-01-27
申请人： Juy-Lung Li , Tse-Yong Yao , Fred C. Redeker , Rajeev Bajaj , Yutao Ma
发明人： Juy-Lung Li , Tse-Yong Yao , Fred C. Redeker , Rajeev Bajaj , Yutao Ma
IPC分类号： H01L21463
CPC分类号： H01L21/7684 , H01L21/02074 , H01L21/3212
摘要： Cu metallization is treated to reduce defects and effect passivation, and to reduce leakage between lines, by removing surface defects subsequent to CMP and barrier layer removal. Embodiments include the sequential steps of: CMP and barrier layer removal; buffing with a solution comprising citric acid, ammonium hydroxide and deionized water to remove copper oxide; rinsing with deionized water or an inhibitor solution, e.g., benzotriazole or 5-methyl triazole in deionized water; buffing with an abrasive slurry; and rinsing with deionized water or an inhibitor solution.
摘要翻译：处理Cu金属化以减少缺陷并实现钝化，并通过去除CMP和阻挡层去除之后的表面缺陷来减少线之间的泄漏。实施例包括顺序步骤：CMP和阻挡层去除; 用包含柠檬酸，氢氧化铵和去离子水的溶液抛光以除去氧化铜; 用去离子水或抑制剂溶液（例如苯并三唑或5-甲基三唑）在去离子水中冲洗; 用磨料浆抛光; 并用去离子水或抑制剂溶液冲洗。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式