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    • 6. 发明专利
    • DEVICE AND METHOD FOR NUMERICAL CONTROL
    • JPH10320026A
    • 1998-12-04
    • JP13001197
    • 1997-05-20
    • MITSUBISHI ELECTRIC CORP
    • SATOU TOMONORIIWASAKI TAKASHITAKAHASHI YOSHIFUMI
    • G05B19/4093G05B19/4105
    • PROBLEM TO BE SOLVED: To provide excellent track accuracy without lowering a speed by providing a joint correction part for inserting a route for making a curvature or acceleration continuous to the joint of the routes. SOLUTION: This numerical control(NC) device 102A is constituted of a program interpretation part 201, the joint correction part 701 and an interpolation/acceleration-deceleration part 203. In an NC program, at a part to correct the joint part, a correction width is described following a specified code (JL) and a numerical value for indicating an allowable error is described following the different specified code (JT). For instance, the correction width is 30 and the allowable error is 10. The joint correction part 701 inserts a spline curve for satisfying the specified correction width and allowable error and making the curvature or the acceleration continuous to the part of the joint describing the specified code in an original route 205 and corrects the joint. Corresponding to the route 206 after correction, in the interpolation and acceleration-deceleration part 203, interpolation and acceleration-deceleration are performed and a command to a servo amplifier is prepared.
    • 7. 发明专利
    • ANALOG INTERPOLATING CIRCUIT
    • JPS58114104A
    • 1983-07-07
    • JP21485781
    • 1981-12-26
    • SHIMADZU CORP
    • KANOU IKUO
    • H03M1/66G05B19/07G05B19/4105H04B1/10H04B14/04
    • PURPOSE:To make an analog output smooth without shortening the derivation cycle of a CPU, by obtaining a variation forecasting value on a basis of the current value of digital information and the value of it several clocks before and subjecting the integral value of this forecasting value and a signal, which is obtained by converting analogically said current value, to the adding processing. CONSTITUTION:A digital signal output of a CPU1 is applied to a shift register 3 and a D/A converter 2, and the current value is converted analogically in the converter 2 and is inputted to one terminal of a variation forecasting operation circuit 4. The signal of the shift register 3 is applied as a signal one clock before to a D/A converter 5, and the signal one clock before is converted in the converter 5 and is applied to the other terminal of the circuit 4. A variation forecasting value is outputted from this circuit 4 and is integrated in an integration circuit 6. The integral value of the forecasting value and the analog signal of the current value from the converter 2 are added in an analog adder 7, and the analog output from an output terminal 8 is made into a continuous signal without shortening the derivation cycle of the digital signal from the CPU1.